summaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
* Over simpliefied CPUHEADmasterFreeArtMan2019-07-091-0/+16
* Fixes in cpu_add moduleFreeArtMan2018-12-053-75/+5
* Different versions of register d-flip-flop, sr-latch, all have issues, becous...FreeArtMan2018-12-0414-4/+598
* Added initial CPU SR-latchFreeArtMan2018-12-033-0/+165
* CPU add adder16FreeArtMan2018-11-133-0/+290
* Added CPU FULL_ADDERFreeArtMan2018-11-073-0/+202
* Add CPU HALF_ADDERFreeArtMan2018-11-053-0/+176
* Add DMUXFreeArtMan2018-11-043-0/+146
* Add CPU MUXFreeArtMan2018-11-034-0/+173
* Add CPU XORFreeArtMan2018-10-154-0/+104
* Add CPU ORFreeArtMan2018-10-154-0/+106
* Add CPU NOTFreeArtMan2018-10-154-0/+96
* Add CPU NANDFreeArtMan2018-10-154-0/+104
* Initial cpu8 isaFreeArtMan2018-10-141-0/+155
* Added hello world exampleFreeArtMan2018-10-148-0/+205
* StartFreeArtMan2018-10-141-0/+0