| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Different versions of register d-flip-flop, sr-latch, all have issues, ↵ | FreeArtMan | 2018-12-04 | 14 | -4/+598 |
| | | | | | becouse of no delay, and cpu_code_reg implemented without gate logic | ||||
| * | Added initial CPU SR-latch | FreeArtMan | 2018-12-03 | 3 | -0/+165 |
| | | |||||
| * | CPU add adder16 | FreeArtMan | 2018-11-13 | 3 | -0/+290 |
| | | |||||
| * | Added CPU FULL_ADDER | FreeArtMan | 2018-11-07 | 3 | -0/+202 |
| | | |||||
| * | Add CPU HALF_ADDER | FreeArtMan | 2018-11-05 | 3 | -0/+176 |
| | | |||||
| * | Add DMUX | FreeArtMan | 2018-11-04 | 3 | -0/+146 |
| | | |||||
| * | Add CPU MUX | FreeArtMan | 2018-11-03 | 4 | -0/+173 |
| | | |||||
| * | Add CPU XOR | FreeArtMan | 2018-10-15 | 4 | -0/+104 |
| | | |||||
| * | Add CPU OR | FreeArtMan | 2018-10-15 | 4 | -0/+106 |
| | | |||||
| * | Add CPU NOT | FreeArtMan | 2018-10-15 | 4 | -0/+96 |
| | | |||||
| * | Add CPU NAND | FreeArtMan | 2018-10-15 | 4 | -0/+104 |
| | | |||||
| * | Added hello world example | FreeArtMan | 2018-10-14 | 8 | -0/+205 |
 |
index : cpu8.git | |
| CPU related snippets | FreeArtMan |
| summaryrefslogtreecommitdiff |