From e943743711ae48839e6046ff427e2e40d8bd51de Mon Sep 17 00:00:00 2001
From: FreeArtMan <dos21h@gmail.com>
Date: Mon, 5 Nov 2018 20:57:50 +0000
Subject: Add CPU HALF_ADDER

---
 cpu8/cpu_half_adder/cpu_half_adder.hpp | 91 ++++++++++++++++++++++++++++++++++
 1 file changed, 91 insertions(+)
 create mode 100644 cpu8/cpu_half_adder/cpu_half_adder.hpp

(limited to 'cpu8/cpu_half_adder/cpu_half_adder.hpp')

diff --git a/cpu8/cpu_half_adder/cpu_half_adder.hpp b/cpu8/cpu_half_adder/cpu_half_adder.hpp
new file mode 100644
index 0000000..ee115da
--- /dev/null
+++ b/cpu8/cpu_half_adder/cpu_half_adder.hpp
@@ -0,0 +1,91 @@
+#ifndef __SYSC_CPU_DMUX_HPP
+#define __SYSC_CPU_DMUX_HPP
+
+#include "systemc.h"
+#include "../cpu_and/cpu_and.hpp"
+#include "../cpu_or/cpu_or.hpp"
+#include "../cpu_not/cpu_not.hpp"
+
+SC_MODULE (cpu_and2) 
+{
+	sc_in <bool> in_a;
+	sc_in <bool> in_b;
+	sc_port<sc_signal_out_if<bool>,2> out_c;
+
+	void do_and2()
+	{
+		//out_c[0]->write( in_a.read() && in_b.read() );
+		for (int i=0; i<out_c.size();i++)
+		{
+			out_c[i]->write(in_a.read() && in_b.read());
+		}
+	}
+
+	SC_CTOR(cpu_and2)
+	{
+		SC_METHOD(do_and2);
+		sensitive << in_a << in_b;
+	}
+
+};
+
+SC_MODULE (cpu_half_adder) 
+{
+	//Inputs
+	sc_in <bool> in_a;
+	sc_in <bool> in_b;
+	sc_out <bool> out_sum;
+	sc_out <bool> out_carry;
+
+	cpu_and2 *and1,*and2;
+	cpu_or *or1;
+	cpu_not *not1;
+
+	sc_signal<bool> sig_not1and2, sig_or1and2;
+	sc_signal<bool,SC_MANY_WRITERS> sig_and1not1, sig_and1not1_1;
+
+	void do_half_adder()
+	{
+		/*
+		if (in_sel.read() == 0)
+		{
+			out_c.write(in_a.read());
+		}
+		if (in_sel.read() == 1)
+		{
+			out_c.write(in_b.read());
+		}
+		*/
+
+	}
+
+	SC_CTOR(cpu_half_adder)
+	{
+		and1 = new cpu_and2("AND1");
+		and2 = new cpu_and2("AND2");
+		not1 = new cpu_not("NOT1");
+		or1 = new cpu_or("OR1");
+		
+		and1->in_a(in_a);
+		and1->in_b(in_b);
+		and1->out_c(sig_and1not1);
+		and1->out_c(out_carry);
+
+		and2->in_a(sig_not1and2);
+		and2->in_b(sig_or1and2);
+		and2->out_c(out_sum);
+
+		not1->in_a(sig_and1not1);
+		not1->out_b(sig_not1and2);
+
+		or1->in_a(in_a);
+		or1->in_b(in_b);
+		or1->out_c(sig_or1and2);
+
+		//SC_METHOD(do_dmux);
+		//sensitive << in_a << in_b << in_sel;
+	}
+
+};
+
+#endif
\ No newline at end of file
-- 
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