`include "parameters.h"

module test_risc_16bit_cpu;

// Inputs
reg clk;

// Instantiate the Unit Under Test (UUT)
risc_16bit_cpu uut (
    .clk(clk)
);

initial begin
    $display("Start testing risc 16bit cpu");
    $dumpfile("test_risc_16bit_cpu.vcd");
    $dumpvars(0,test_risc_16bit_cpu);


    clk <=0;
    `simulation_time;
    $finish;
end

always begin
        #5 clk = ~clk;
end

endmodule