From be97234d48b77b022748a0e4ea36057be3e78fe3 Mon Sep 17 00:00:00 2001 From: FreeArtMan Date: Sun, 29 Oct 2017 00:06:35 +0100 Subject: Fixed some errors, fixed title --- md/writeup/stm32f4_sdram_configuration.md | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/md/writeup/stm32f4_sdram_configuration.md b/md/writeup/stm32f4_sdram_configuration.md index 0ea866c..c2c3ab5 100644 --- a/md/writeup/stm32f4_sdram_configuration.md +++ b/md/writeup/stm32f4_sdram_configuration.md @@ -1,4 +1,4 @@ -title: DSP Low-pass FIR filter +title: STM32F4 sdram configuration keywords:c,stm32,stm32f4,sdram,configuration,timing # STM32F4 sdram configuration @@ -11,12 +11,12 @@ SDRAM with easy. F4 have 2 internals banks and memory ranges where SDRAM could be configured. -## SDRAM parametrs +## SDRAM parameters ## STM32 SDRAM FMC params -STM32F4 SDRAM FMC(Flexible Memory Controller) have many parametrs that allow -to confgiure SDRAM, depending on chip you can have more or less memory avaliable +STM32F4 SDRAM FMC(Flexible Memory Controller) have many parameters that allow +to configure SDRAM, depending on chip you can have more or less memory available different clock speeds. @@ -47,7 +47,7 @@ Timing configuration configured in FMC_SDTR1 register | RPDelay | 1-16 cycles | TRCD | | RCDelay | 1-16 cycles | TRC | -## SDRAM initialisation +## SDRAM initialization Before SDRAM could start working it need to be configured and commended are sended. Command are just setting up appropriate bits and wait of 100ms. @@ -135,9 +135,9 @@ Commands for configure SDRAM | Clock Suspend Mode Exit / PowerDown Mode Exit | | Data Write / Output Enable | -## Calculate parametrs +## Calculate parameters -### AS4C16M16SA chip parametrs +### AS4C16M16SA chip parameters Configuration for SystemClock=180Mhz and SDRAM clock rate 90Mhz. Some values are adjusted to work. -- cgit v1.2.3