From ec61b3e0e6084950eb4d5c95f83e442a01765a35 Mon Sep 17 00:00:00 2001 From: Arturs Artamonovs Date: Sat, 12 Mar 2022 17:48:54 +0000 Subject: Working project --- hardware/src/r820/include/reg_field.h | 60 +++++ hardware/src/r820/include/rtl-sdr.h | 408 +++++++++++++++++++++++++++++ hardware/src/r820/include/rtl-sdr_export.h | 47 ++++ hardware/src/r820/include/rtlsdr_i2c.h | 8 + hardware/src/r820/include/tuner_e4k.h | 222 ++++++++++++++++ hardware/src/r820/include/tuner_fc0012.h | 36 +++ hardware/src/r820/include/tuner_fc0013.h | 37 +++ hardware/src/r820/include/tuner_fc2580.h | 127 +++++++++ hardware/src/r820/include/tuner_r82xx.h | 120 +++++++++ 9 files changed, 1065 insertions(+) create mode 100644 hardware/src/r820/include/reg_field.h create mode 100644 hardware/src/r820/include/rtl-sdr.h create mode 100644 hardware/src/r820/include/rtl-sdr_export.h create mode 100644 hardware/src/r820/include/rtlsdr_i2c.h create mode 100644 hardware/src/r820/include/tuner_e4k.h create mode 100644 hardware/src/r820/include/tuner_fc0012.h create mode 100644 hardware/src/r820/include/tuner_fc0013.h create mode 100644 hardware/src/r820/include/tuner_fc2580.h create mode 100644 hardware/src/r820/include/tuner_r82xx.h (limited to 'hardware/src/r820/include') diff --git a/hardware/src/r820/include/reg_field.h b/hardware/src/r820/include/reg_field.h new file mode 100644 index 0000000..18a6922 --- /dev/null +++ b/hardware/src/r820/include/reg_field.h @@ -0,0 +1,60 @@ +#ifndef _REG_FIELD_H +#define _REG_FIELD_H + +#include +#include + +enum cmd_op { + CMD_OP_GET = (1 << 0), + CMD_OP_SET = (1 << 1), + CMD_OP_EXEC = (1 << 2), +}; + +enum pstate { + ST_IN_CMD, + ST_IN_ARG, +}; + +struct strbuf { + uint8_t idx; + char buf[32]; +}; + +struct cmd_state { + struct strbuf cmd; + struct strbuf arg; + enum pstate state; + void (*out)(const char *format, va_list ap); +}; + +struct cmd { + const char *cmd; + uint32_t ops; + int (*cb)(struct cmd_state *cs, enum cmd_op op, const char *cmd, + int argc, char **argv); + const char *help; +}; + +/* structure describing a field in a register */ +struct reg_field { + uint8_t reg; + uint8_t shift; + uint8_t width; +}; + +struct reg_field_ops { + const struct reg_field *fields; + const char **field_names; + uint32_t num_fields; + void *data; + int (*write_cb)(void *data, uint32_t reg, uint32_t val); + uint32_t (*read_cb)(void *data, uint32_t reg); +}; + +uint32_t reg_field_read(struct reg_field_ops *ops, struct reg_field *field); +int reg_field_write(struct reg_field_ops *ops, struct reg_field *field, uint32_t val); +int reg_field_cmd(struct cmd_state *cs, enum cmd_op op, + const char *cmd, int argc, char **argv, + struct reg_field_ops *ops); + +#endif diff --git a/hardware/src/r820/include/rtl-sdr.h b/hardware/src/r820/include/rtl-sdr.h new file mode 100644 index 0000000..44f2d59 --- /dev/null +++ b/hardware/src/r820/include/rtl-sdr.h @@ -0,0 +1,408 @@ +/* + * rtl-sdr, turns your Realtek RTL2832 based DVB dongle into a SDR receiver + * Copyright (C) 2012-2013 by Steve Markgraf + * Copyright (C) 2012 by Dimitri Stolnikov + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef __RTL_SDR_H +#define __RTL_SDR_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include + +typedef struct rtlsdr_dev rtlsdr_dev_t; + +RTLSDR_API uint32_t rtlsdr_get_device_count(void); +//uint32_t rtlsdr_get_device_count(void); + +RTLSDR_API const char* rtlsdr_get_device_name(uint32_t index); + +/*! + * Get USB device strings. + * + * NOTE: The string arguments must provide space for up to 256 bytes. + * + * \param index the device index + * \param manufact manufacturer name, may be NULL + * \param product product name, may be NULL + * \param serial serial number, may be NULL + * \return 0 on success + */ +RTLSDR_API int rtlsdr_get_device_usb_strings(uint32_t index, + char *manufact, + char *product, + char *serial); + +/*! + * Get device index by USB serial string descriptor. + * + * \param serial serial string of the device + * \return device index of first device where the name matched + * \return -1 if name is NULL + * \return -2 if no devices were found at all + * \return -3 if devices were found, but none with matching name + */ +RTLSDR_API int rtlsdr_get_index_by_serial(const char *serial); + +RTLSDR_API int rtlsdr_open(rtlsdr_dev_t **dev, uint32_t index); + +RTLSDR_API int rtlsdr_close(rtlsdr_dev_t *dev); + +/* configuration functions */ + +/*! + * Set crystal oscillator frequencies used for the RTL2832 and the tuner IC. + * + * Usually both ICs use the same clock. Changing the clock may make sense if + * you are applying an external clock to the tuner or to compensate the + * frequency (and samplerate) error caused by the original (cheap) crystal. + * + * NOTE: Call this function only if you fully understand the implications. + * + * \param dev the device handle given by rtlsdr_open() + * \param rtl_freq frequency value used to clock the RTL2832 in Hz + * \param tuner_freq frequency value used to clock the tuner IC in Hz + * \return 0 on success + */ +RTLSDR_API int rtlsdr_set_xtal_freq(rtlsdr_dev_t *dev, uint32_t rtl_freq, + uint32_t tuner_freq); + +/*! + * Get crystal oscillator frequencies used for the RTL2832 and the tuner IC. + * + * Usually both ICs use the same clock. + * + * \param dev the device handle given by rtlsdr_open() + * \param rtl_freq frequency value used to clock the RTL2832 in Hz + * \param tuner_freq frequency value used to clock the tuner IC in Hz + * \return 0 on success + */ +RTLSDR_API int rtlsdr_get_xtal_freq(rtlsdr_dev_t *dev, uint32_t *rtl_freq, + uint32_t *tuner_freq); + +/*! + * Get USB device strings. + * + * NOTE: The string arguments must provide space for up to 256 bytes. + * + * \param dev the device handle given by rtlsdr_open() + * \param manufact manufacturer name, may be NULL + * \param product product name, may be NULL + * \param serial serial number, may be NULL + * \return 0 on success + */ +RTLSDR_API int rtlsdr_get_usb_strings(rtlsdr_dev_t *dev, char *manufact, + char *product, char *serial); + +/*! + * Write the device EEPROM + * + * \param dev the device handle given by rtlsdr_open() + * \param data buffer of data to be written + * \param offset address where the data should be written + * \param len length of the data + * \return 0 on success + * \return -1 if device handle is invalid + * \return -2 if EEPROM size is exceeded + * \return -3 if no EEPROM was found + */ + +RTLSDR_API int rtlsdr_write_eeprom(rtlsdr_dev_t *dev, uint8_t *data, + uint8_t offset, uint16_t len); + +/*! + * Read the device EEPROM + * + * \param dev the device handle given by rtlsdr_open() + * \param data buffer where the data should be written + * \param offset address where the data should be read from + * \param len length of the data + * \return 0 on success + * \return -1 if device handle is invalid + * \return -2 if EEPROM size is exceeded + * \return -3 if no EEPROM was found + */ + +RTLSDR_API int rtlsdr_read_eeprom(rtlsdr_dev_t *dev, uint8_t *data, + uint8_t offset, uint16_t len); + +RTLSDR_API int rtlsdr_set_center_freq(rtlsdr_dev_t *dev, uint32_t freq); + +/*! + * Get actual frequency the device is tuned to. + * + * \param dev the device handle given by rtlsdr_open() + * \return 0 on error, frequency in Hz otherwise + */ +RTLSDR_API uint32_t rtlsdr_get_center_freq(rtlsdr_dev_t *dev); + +/*! + * Set the frequency correction value for the device. + * + * \param dev the device handle given by rtlsdr_open() + * \param ppm correction value in parts per million (ppm) + * \return 0 on success + */ +RTLSDR_API int rtlsdr_set_freq_correction(rtlsdr_dev_t *dev, int ppm); + +/*! + * Get actual frequency correction value of the device. + * + * \param dev the device handle given by rtlsdr_open() + * \return correction value in parts per million (ppm) + */ +RTLSDR_API int rtlsdr_get_freq_correction(rtlsdr_dev_t *dev); + +enum rtlsdr_tuner { + RTLSDR_TUNER_UNKNOWN = 0, + RTLSDR_TUNER_E4000, + RTLSDR_TUNER_FC0012, + RTLSDR_TUNER_FC0013, + RTLSDR_TUNER_FC2580, + RTLSDR_TUNER_R820T, + RTLSDR_TUNER_R828D +}; + +/*! + * Get the tuner type. + * + * \param dev the device handle given by rtlsdr_open() + * \return RTLSDR_TUNER_UNKNOWN on error, tuner type otherwise + */ +RTLSDR_API enum rtlsdr_tuner rtlsdr_get_tuner_type(rtlsdr_dev_t *dev); + +/*! + * Get a list of gains supported by the tuner. + * + * NOTE: The gains argument must be preallocated by the caller. If NULL is + * being given instead, the number of available gain values will be returned. + * + * \param dev the device handle given by rtlsdr_open() + * \param gains array of gain values. In tenths of a dB, 115 means 11.5 dB. + * \return <= 0 on error, number of available (returned) gain values otherwise + */ +RTLSDR_API int rtlsdr_get_tuner_gains(rtlsdr_dev_t *dev, int *gains); + +/*! + * Set the gain for the device. + * Manual gain mode must be enabled for this to work. + * + * Valid gain values (in tenths of a dB) for the E4000 tuner: + * -10, 15, 40, 65, 90, 115, 140, 165, 190, + * 215, 240, 290, 340, 420, 430, 450, 470, 490 + * + * Valid gain values may be queried with \ref rtlsdr_get_tuner_gains function. + * + * \param dev the device handle given by rtlsdr_open() + * \param gain in tenths of a dB, 115 means 11.5 dB. + * \return 0 on success + */ +RTLSDR_API int rtlsdr_set_tuner_gain(rtlsdr_dev_t *dev, int gain); + +/*! + * Set the bandwidth for the device. + * + * \param dev the device handle given by rtlsdr_open() + * \param bw bandwidth in Hz. Zero means automatic BW selection. + * \return 0 on success + */ +RTLSDR_API int rtlsdr_set_tuner_bandwidth(rtlsdr_dev_t *dev, uint32_t bw); + +/*! + * Get actual gain the device is configured to. + * + * \param dev the device handle given by rtlsdr_open() + * \return 0 on error, gain in tenths of a dB, 115 means 11.5 dB. + */ +RTLSDR_API int rtlsdr_get_tuner_gain(rtlsdr_dev_t *dev); + +/*! + * Set the intermediate frequency gain for the device. + * + * \param dev the device handle given by rtlsdr_open() + * \param stage intermediate frequency gain stage number (1 to 6 for E4000) + * \param gain in tenths of a dB, -30 means -3.0 dB. + * \return 0 on success + */ +RTLSDR_API int rtlsdr_set_tuner_if_gain(rtlsdr_dev_t *dev, int stage, int gain); + +/*! + * Set the gain mode (automatic/manual) for the device. + * Manual gain mode must be enabled for the gain setter function to work. + * + * \param dev the device handle given by rtlsdr_open() + * \param manual gain mode, 1 means manual gain mode shall be enabled. + * \return 0 on success + */ +RTLSDR_API int rtlsdr_set_tuner_gain_mode(rtlsdr_dev_t *dev, int manual); + +/*! + * Set the sample rate for the device, also selects the baseband filters + * according to the requested sample rate for tuners where this is possible. + * + * \param dev the device handle given by rtlsdr_open() + * \param rate the sample rate to be set, possible values are: + * 225001 - 300000 Hz + * 900001 - 3200000 Hz + * sample loss is to be expected for rates > 2400000 + * \return 0 on success, -EINVAL on invalid rate + */ +RTLSDR_API int rtlsdr_set_sample_rate(rtlsdr_dev_t *dev, uint32_t rate); + +/*! + * Get actual sample rate the device is configured to. + * + * \param dev the device handle given by rtlsdr_open() + * \return 0 on error, sample rate in Hz otherwise + */ +RTLSDR_API uint32_t rtlsdr_get_sample_rate(rtlsdr_dev_t *dev); + +/*! + * Enable test mode that returns an 8 bit counter instead of the samples. + * The counter is generated inside the RTL2832. + * + * \param dev the device handle given by rtlsdr_open() + * \param on mode, 1 means enabled, 0 disabled + * \return 0 on success + */ +RTLSDR_API int rtlsdr_set_testmode(rtlsdr_dev_t *dev, int on); + +/*! + * Enable or disable the internal digital AGC of the RTL2832. + * + * \param dev the device handle given by rtlsdr_open() + * \param on AGC mode, 1 means enabled, 0 disabled + * \return 0 on success + */ +RTLSDR_API int rtlsdr_set_agc_mode(rtlsdr_dev_t *dev, int on); + +/*! + * Enable or disable the direct sampling mode. When enabled, the IF mode + * of the RTL2832 is activated, and rtlsdr_set_center_freq() will control + * the IF-frequency of the DDC, which can be used to tune from 0 to 28.8 MHz + * (xtal frequency of the RTL2832). + * + * \param dev the device handle given by rtlsdr_open() + * \param on 0 means disabled, 1 I-ADC input enabled, 2 Q-ADC input enabled + * \return 0 on success + */ +RTLSDR_API int rtlsdr_set_direct_sampling(rtlsdr_dev_t *dev, int on); + +/*! + * Get state of the direct sampling mode + * + * \param dev the device handle given by rtlsdr_open() + * \return -1 on error, 0 means disabled, 1 I-ADC input enabled + * 2 Q-ADC input enabled + */ +RTLSDR_API int rtlsdr_get_direct_sampling(rtlsdr_dev_t *dev); + +/*! + * Enable or disable offset tuning for zero-IF tuners, which allows to avoid + * problems caused by the DC offset of the ADCs and 1/f noise. + * + * \param dev the device handle given by rtlsdr_open() + * \param on 0 means disabled, 1 enabled + * \return 0 on success + */ +RTLSDR_API int rtlsdr_set_offset_tuning(rtlsdr_dev_t *dev, int on); + +/*! + * Get state of the offset tuning mode + * + * \param dev the device handle given by rtlsdr_open() + * \return -1 on error, 0 means disabled, 1 enabled + */ +RTLSDR_API int rtlsdr_get_offset_tuning(rtlsdr_dev_t *dev); + +/* streaming functions */ + +RTLSDR_API int rtlsdr_reset_buffer(rtlsdr_dev_t *dev); + +RTLSDR_API int rtlsdr_read_sync(rtlsdr_dev_t *dev, void *buf, int len, int *n_read); + +typedef void(*rtlsdr_read_async_cb_t)(unsigned char *buf, uint32_t len, void *ctx); + +/*! + * Read samples from the device asynchronously. This function will block until + * it is being canceled using rtlsdr_cancel_async() + * + * NOTE: This function is deprecated and is subject for removal. + * + * \param dev the device handle given by rtlsdr_open() + * \param cb callback function to return received samples + * \param ctx user specific context to pass via the callback function + * \return 0 on success + */ +RTLSDR_API int rtlsdr_wait_async(rtlsdr_dev_t *dev, rtlsdr_read_async_cb_t cb, void *ctx); + +/*! + * Read samples from the device asynchronously. This function will block until + * it is being canceled using rtlsdr_cancel_async() + * + * \param dev the device handle given by rtlsdr_open() + * \param cb callback function to return received samples + * \param ctx user specific context to pass via the callback function + * \param buf_num optional buffer count, buf_num * buf_len = overall buffer size + * set to 0 for default buffer count (15) + * \param buf_len optional buffer length, must be multiple of 512, + * should be a multiple of 16384 (URB size), set to 0 + * for default buffer length (16 * 32 * 512) + * \return 0 on success + */ +RTLSDR_API int rtlsdr_read_async(rtlsdr_dev_t *dev, + rtlsdr_read_async_cb_t cb, + void *ctx, + uint32_t buf_num, + uint32_t buf_len); + +/*! + * Cancel all pending asynchronous operations on the device. + * + * \param dev the device handle given by rtlsdr_open() + * \return 0 on success + */ +RTLSDR_API int rtlsdr_cancel_async(rtlsdr_dev_t *dev); + +/*! + * Enable or disable the bias tee on GPIO PIN 0. + * + * \param dev the device handle given by rtlsdr_open() + * \param on 1 for Bias T on. 0 for Bias T off. + * \return -1 if device is not initialized. 0 otherwise. + */ +RTLSDR_API int rtlsdr_set_bias_tee(rtlsdr_dev_t *dev, int on); + +/*! + * Enable or disable the bias tee on the given GPIO pin. + * + * \param dev the device handle given by rtlsdr_open() + * \param gpio the gpio pin to configure as a Bias T control. + * \param on 1 for Bias T on. 0 for Bias T off. + * \return -1 if device is not initialized. 0 otherwise. + */ +RTLSDR_API int rtlsdr_set_bias_tee_gpio(rtlsdr_dev_t *dev, int gpio, int on); + + +#ifdef __cplusplus +} +#endif + +#endif /* __RTL_SDR_H */ diff --git a/hardware/src/r820/include/rtl-sdr_export.h b/hardware/src/r820/include/rtl-sdr_export.h new file mode 100644 index 0000000..69e178d --- /dev/null +++ b/hardware/src/r820/include/rtl-sdr_export.h @@ -0,0 +1,47 @@ +/* + * rtl-sdr, turns your Realtek RTL2832 based DVB dongle into a SDR receiver + * Copyright (C) 2012 by Hoernchen + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef RTLSDR_EXPORT_H +#define RTLSDR_EXPORT_H + +#if defined __GNUC__ +# if __GNUC__ >= 4 +# define __SDR_EXPORT __attribute__((visibility("default"))) +# define __SDR_IMPORT __attribute__((visibility("default"))) +# else +# define __SDR_EXPORT +# define __SDR_IMPORT +# endif +#elif _MSC_VER +# define __SDR_EXPORT __declspec(dllexport) +# define __SDR_IMPORT __declspec(dllimport) +#else +# define __SDR_EXPORT +# define __SDR_IMPORT +#endif + +#ifndef rtlsdr_STATIC +# ifdef rtlsdr_EXPORTS +# define RTLSDR_API __SDR_EXPORT +# else +# define RTLSDR_API __SDR_IMPORT +# endif +#else +#define RTLSDR_API +#endif +#endif /* RTLSDR_EXPORT_H */ diff --git a/hardware/src/r820/include/rtlsdr_i2c.h b/hardware/src/r820/include/rtlsdr_i2c.h new file mode 100644 index 0000000..7676689 --- /dev/null +++ b/hardware/src/r820/include/rtlsdr_i2c.h @@ -0,0 +1,8 @@ +#ifndef __I2C_H +#define __I2C_H + +uint32_t rtlsdr_get_tuner_clock(void *dev); +int rtlsdr_i2c_write_fn(void *dev, uint8_t addr, uint8_t *buf, int len); +int rtlsdr_i2c_read_fn(void *dev, uint8_t addr, uint8_t *buf, int len); + +#endif diff --git a/hardware/src/r820/include/tuner_e4k.h b/hardware/src/r820/include/tuner_e4k.h new file mode 100644 index 0000000..79591ce --- /dev/null +++ b/hardware/src/r820/include/tuner_e4k.h @@ -0,0 +1,222 @@ +#ifndef _E4K_TUNER_H +#define _E4K_TUNER_H + +/* + * Elonics E4000 tuner driver + * + * (C) 2011-2012 by Harald Welte + * (C) 2012 by Sylvain Munaut + * (C) 2012 by Hoernchen + * + * All Rights Reserved + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#define E4K_I2C_ADDR 0xc8 +#define E4K_CHECK_ADDR 0x02 +#define E4K_CHECK_VAL 0x40 + +enum e4k_reg { + E4K_REG_MASTER1 = 0x00, + E4K_REG_MASTER2 = 0x01, + E4K_REG_MASTER3 = 0x02, + E4K_REG_MASTER4 = 0x03, + E4K_REG_MASTER5 = 0x04, + E4K_REG_CLK_INP = 0x05, + E4K_REG_REF_CLK = 0x06, + E4K_REG_SYNTH1 = 0x07, + E4K_REG_SYNTH2 = 0x08, + E4K_REG_SYNTH3 = 0x09, + E4K_REG_SYNTH4 = 0x0a, + E4K_REG_SYNTH5 = 0x0b, + E4K_REG_SYNTH6 = 0x0c, + E4K_REG_SYNTH7 = 0x0d, + E4K_REG_SYNTH8 = 0x0e, + E4K_REG_SYNTH9 = 0x0f, + E4K_REG_FILT1 = 0x10, + E4K_REG_FILT2 = 0x11, + E4K_REG_FILT3 = 0x12, + // gap + E4K_REG_GAIN1 = 0x14, + E4K_REG_GAIN2 = 0x15, + E4K_REG_GAIN3 = 0x16, + E4K_REG_GAIN4 = 0x17, + // gap + E4K_REG_AGC1 = 0x1a, + E4K_REG_AGC2 = 0x1b, + E4K_REG_AGC3 = 0x1c, + E4K_REG_AGC4 = 0x1d, + E4K_REG_AGC5 = 0x1e, + E4K_REG_AGC6 = 0x1f, + E4K_REG_AGC7 = 0x20, + E4K_REG_AGC8 = 0x21, + // gap + E4K_REG_AGC11 = 0x24, + E4K_REG_AGC12 = 0x25, + // gap + E4K_REG_DC1 = 0x29, + E4K_REG_DC2 = 0x2a, + E4K_REG_DC3 = 0x2b, + E4K_REG_DC4 = 0x2c, + E4K_REG_DC5 = 0x2d, + E4K_REG_DC6 = 0x2e, + E4K_REG_DC7 = 0x2f, + E4K_REG_DC8 = 0x30, + // gap + E4K_REG_QLUT0 = 0x50, + E4K_REG_QLUT1 = 0x51, + E4K_REG_QLUT2 = 0x52, + E4K_REG_QLUT3 = 0x53, + // gap + E4K_REG_ILUT0 = 0x60, + E4K_REG_ILUT1 = 0x61, + E4K_REG_ILUT2 = 0x62, + E4K_REG_ILUT3 = 0x63, + // gap + E4K_REG_DCTIME1 = 0x70, + E4K_REG_DCTIME2 = 0x71, + E4K_REG_DCTIME3 = 0x72, + E4K_REG_DCTIME4 = 0x73, + E4K_REG_PWM1 = 0x74, + E4K_REG_PWM2 = 0x75, + E4K_REG_PWM3 = 0x76, + E4K_REG_PWM4 = 0x77, + E4K_REG_BIAS = 0x78, + E4K_REG_CLKOUT_PWDN = 0x7a, + E4K_REG_CHFILT_CALIB = 0x7b, + E4K_REG_I2C_REG_ADDR = 0x7d, + // FIXME +}; + +#define E4K_MASTER1_RESET (1 << 0) +#define E4K_MASTER1_NORM_STBY (1 << 1) +#define E4K_MASTER1_POR_DET (1 << 2) + +#define E4K_SYNTH1_PLL_LOCK (1 << 0) +#define E4K_SYNTH1_BAND_SHIF 1 + +#define E4K_SYNTH7_3PHASE_EN (1 << 3) + +#define E4K_SYNTH8_VCOCAL_UPD (1 << 2) + +#define E4K_FILT3_DISABLE (1 << 5) + +#define E4K_AGC1_LIN_MODE (1 << 4) +#define E4K_AGC1_LNA_UPDATE (1 << 5) +#define E4K_AGC1_LNA_G_LOW (1 << 6) +#define E4K_AGC1_LNA_G_HIGH (1 << 7) + +#define E4K_AGC6_LNA_CAL_REQ (1 << 4) + +#define E4K_AGC7_MIX_GAIN_AUTO (1 << 0) +#define E4K_AGC7_GAIN_STEP_5dB (1 << 5) + +#define E4K_AGC8_SENS_LIN_AUTO (1 << 0) + +#define E4K_AGC11_LNA_GAIN_ENH (1 << 0) + +#define E4K_DC1_CAL_REQ (1 << 0) + +#define E4K_DC5_I_LUT_EN (1 << 0) +#define E4K_DC5_Q_LUT_EN (1 << 1) +#define E4K_DC5_RANGE_DET_EN (1 << 2) +#define E4K_DC5_RANGE_EN (1 << 3) +#define E4K_DC5_TIMEVAR_EN (1 << 4) + +#define E4K_CLKOUT_DISABLE 0x96 + +#define E4K_CHFCALIB_CMD (1 << 0) + +#define E4K_AGC1_MOD_MASK 0xF + +enum e4k_agc_mode { + E4K_AGC_MOD_SERIAL = 0x0, + E4K_AGC_MOD_IF_PWM_LNA_SERIAL = 0x1, + E4K_AGC_MOD_IF_PWM_LNA_AUTONL = 0x2, + E4K_AGC_MOD_IF_PWM_LNA_SUPERV = 0x3, + E4K_AGC_MOD_IF_SERIAL_LNA_PWM = 0x4, + E4K_AGC_MOD_IF_PWM_LNA_PWM = 0x5, + E4K_AGC_MOD_IF_DIG_LNA_SERIAL = 0x6, + E4K_AGC_MOD_IF_DIG_LNA_AUTON = 0x7, + E4K_AGC_MOD_IF_DIG_LNA_SUPERV = 0x8, + E4K_AGC_MOD_IF_SERIAL_LNA_AUTON = 0x9, + E4K_AGC_MOD_IF_SERIAL_LNA_SUPERV = 0xa, +}; + +enum e4k_band { + E4K_BAND_VHF2 = 0, + E4K_BAND_VHF3 = 1, + E4K_BAND_UHF = 2, + E4K_BAND_L = 3, +}; + +enum e4k_mixer_filter_bw { + E4K_F_MIX_BW_27M = 0, + E4K_F_MIX_BW_4M6 = 8, + E4K_F_MIX_BW_4M2 = 9, + E4K_F_MIX_BW_3M8 = 10, + E4K_F_MIX_BW_3M4 = 11, + E4K_F_MIX_BW_3M = 12, + E4K_F_MIX_BW_2M7 = 13, + E4K_F_MIX_BW_2M3 = 14, + E4K_F_MIX_BW_1M9 = 15, +}; + +enum e4k_if_filter { + E4K_IF_FILTER_MIX, + E4K_IF_FILTER_CHAN, + E4K_IF_FILTER_RC +}; +struct e4k_pll_params { + uint32_t fosc; + uint32_t intended_flo; + uint32_t flo; + uint16_t x; + uint8_t z; + uint8_t r; + uint8_t r_idx; + uint8_t threephase; +}; + +struct e4k_state { + void *i2c_dev; + uint8_t i2c_addr; + enum e4k_band band; + struct e4k_pll_params vco; + void *rtl_dev; +}; + +int e4k_init(struct e4k_state *e4k); +int e4k_standby(struct e4k_state *e4k, int enable); +int e4k_if_gain_set(struct e4k_state *e4k, uint8_t stage, int8_t value); +int e4k_mixer_gain_set(struct e4k_state *e4k, int8_t value); +int e4k_commonmode_set(struct e4k_state *e4k, int8_t value); +int e4k_tune_freq(struct e4k_state *e4k, uint32_t freq); +int e4k_tune_params(struct e4k_state *e4k, struct e4k_pll_params *p); +uint32_t e4k_compute_pll_params(struct e4k_pll_params *oscp, uint32_t fosc, uint32_t intended_flo); +int e4k_if_filter_bw_get(struct e4k_state *e4k, enum e4k_if_filter filter); +int e4k_if_filter_bw_set(struct e4k_state *e4k, enum e4k_if_filter filter, + uint32_t bandwidth); +int e4k_if_filter_chan_enable(struct e4k_state *e4k, int on); +int e4k_rf_filter_set(struct e4k_state *e4k); + +int e4k_manual_dc_offset(struct e4k_state *e4k, int8_t iofs, int8_t irange, int8_t qofs, int8_t qrange); +int e4k_dc_offset_calibrate(struct e4k_state *e4k); +int e4k_dc_offset_gen_table(struct e4k_state *e4k); + +int e4k_set_lna_gain(struct e4k_state *e4k, int32_t gain); +int e4k_enable_manual_gain(struct e4k_state *e4k, uint8_t manual); +int e4k_set_enh_gain(struct e4k_state *e4k, int32_t gain); +#endif /* _E4K_TUNER_H */ diff --git a/hardware/src/r820/include/tuner_fc0012.h b/hardware/src/r820/include/tuner_fc0012.h new file mode 100644 index 0000000..9dd5356 --- /dev/null +++ b/hardware/src/r820/include/tuner_fc0012.h @@ -0,0 +1,36 @@ +/* + * Fitipower FC0012 tuner driver + * + * Copyright (C) 2012 Hans-Frieder Vogt + * + * modified for use in librtlsdr + * Copyright (C) 2012 Steve Markgraf + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ + +#ifndef _FC0012_H_ +#define _FC0012_H_ + +#define FC0012_I2C_ADDR 0xc6 +#define FC0012_CHECK_ADDR 0x00 +#define FC0012_CHECK_VAL 0xa1 + +int fc0012_init(void *dev); +int fc0012_set_params(void *dev, uint32_t freq, uint32_t bandwidth); +int fc0012_set_gain(void *dev, int gain); + +#endif diff --git a/hardware/src/r820/include/tuner_fc0013.h b/hardware/src/r820/include/tuner_fc0013.h new file mode 100644 index 0000000..68a26ee --- /dev/null +++ b/hardware/src/r820/include/tuner_fc0013.h @@ -0,0 +1,37 @@ +/* + * Fitipower FC0013 tuner driver + * + * Copyright (C) 2012 Hans-Frieder Vogt + * + * modified for use in librtlsdr + * Copyright (C) 2012 Steve Markgraf + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ + +#ifndef _FC0013_H_ +#define _FC0013_H_ + +#define FC0013_I2C_ADDR 0xc6 +#define FC0013_CHECK_ADDR 0x00 +#define FC0013_CHECK_VAL 0xa3 + +int fc0013_init(void *dev); +int fc0013_set_params(void *dev, uint32_t freq, uint32_t bandwidth); +int fc0013_set_gain_mode(void *dev, int manual); +int fc0013_set_lna_gain(void *dev, int gain); + +#endif diff --git a/hardware/src/r820/include/tuner_fc2580.h b/hardware/src/r820/include/tuner_fc2580.h new file mode 100644 index 0000000..9ebd935 --- /dev/null +++ b/hardware/src/r820/include/tuner_fc2580.h @@ -0,0 +1,127 @@ +#ifndef __TUNER_FC2580_H +#define __TUNER_FC2580_H + +#define BORDER_FREQ 2600000 //2.6GHz : The border frequency which determines whether Low VCO or High VCO is used +#define USE_EXT_CLK 0 //0 : Use internal XTAL Oscillator / 1 : Use External Clock input +#define OFS_RSSI 57 + +#define FC2580_I2C_ADDR 0xac +#define FC2580_CHECK_ADDR 0x01 +#define FC2580_CHECK_VAL 0x56 + +typedef enum { + FC2580_UHF_BAND, + FC2580_L_BAND, + FC2580_VHF_BAND, + FC2580_NO_BAND +} fc2580_band_type; + +typedef enum { + FC2580_FCI_FAIL, + FC2580_FCI_SUCCESS +} fc2580_fci_result_type; + +enum FUNCTION_STATUS +{ + FUNCTION_SUCCESS, + FUNCTION_ERROR, +}; + +extern void fc2580_wait_msec(void *pTuner, int a); + +fc2580_fci_result_type fc2580_i2c_write(void *pTuner, unsigned char reg, unsigned char val); +fc2580_fci_result_type fc2580_i2c_read(void *pTuner, unsigned char reg, unsigned char *read_data); + +/*============================================================================== + fc2580 initial setting + + This function is a generic function which gets called to initialize + + fc2580 in DVB-H mode or L-Band TDMB mode + + + + ifagc_mode + type : integer + 1 : Internal AGC + 2 : Voltage Control Mode + +==============================================================================*/ +fc2580_fci_result_type fc2580_set_init(void *pTuner, int ifagc_mode, unsigned int freq_xtal ); + +/*============================================================================== + fc2580 frequency setting + + This function is a generic function which gets called to change LO Frequency + + of fc2580 in DVB-H mode or L-Band TDMB mode + + + + f_lo + Value of target LO Frequency in 'kHz' unit + ex) 2.6GHz = 2600000 + +==============================================================================*/ +fc2580_fci_result_type fc2580_set_freq(void *pTuner, unsigned int f_lo, unsigned int freq_xtal ); + + +/*============================================================================== + fc2580 filter BW setting + + This function is a generic function which gets called to change Bandwidth + + frequency of fc2580's channel selection filter + + + + filter_bw + 1 : 1.53MHz(TDMB) + 6 : 6MHz + 7 : 7MHz + 8 : 7.8MHz + + +==============================================================================*/ +fc2580_fci_result_type fc2580_set_filter( void *pTuner, unsigned char filter_bw, unsigned int freq_xtal ); + +// The following context is FC2580 tuner API source code +// Definitions + +// AGC mode +enum FC2580_AGC_MODE +{ + FC2580_AGC_INTERNAL = 1, + FC2580_AGC_EXTERNAL = 2, +}; + + +// Bandwidth mode +enum FC2580_BANDWIDTH_MODE +{ + FC2580_BANDWIDTH_1530000HZ = 1, + FC2580_BANDWIDTH_6000000HZ = 6, + FC2580_BANDWIDTH_7000000HZ = 7, + FC2580_BANDWIDTH_8000000HZ = 8, +}; + +// Manipulaing functions +int +fc2580_Initialize( + void *pTuner + ); + +int +fc2580_SetRfFreqHz( + void *pTuner, + unsigned long RfFreqHz + ); + +// Extra manipulaing functions +int +fc2580_SetBandwidthMode( + void *pTuner, + int BandwidthMode + ); + +#endif diff --git a/hardware/src/r820/include/tuner_r82xx.h b/hardware/src/r820/include/tuner_r82xx.h new file mode 100644 index 0000000..f6c206a --- /dev/null +++ b/hardware/src/r820/include/tuner_r82xx.h @@ -0,0 +1,120 @@ +/* + * Rafael Micro R820T/R828D driver + * + * Copyright (C) 2013 Mauro Carvalho Chehab + * Copyright (C) 2013 Steve Markgraf + * + * This driver is a heavily modified version of the driver found in the + * Linux kernel: + * http://git.linuxtv.org/linux-2.6.git/history/HEAD:/drivers/media/tuners/r820t.c + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef R82XX_H +#define R82XX_H + +#define R820T_I2C_ADDR 0x34 +#define R828D_I2C_ADDR 0x74 +#define R828D_XTAL_FREQ 16000000 + +#define R82XX_CHECK_ADDR 0x00 +#define R82XX_CHECK_VAL 0x69 + +#define R82XX_IF_FREQ 3570000 + +#define REG_SHADOW_START 5 +#define NUM_REGS 30 +#define NUM_IMR 5 +#define IMR_TRIAL 9 + +#define VER_NUM 49 + +enum r82xx_chip { + CHIP_R820T, + CHIP_R620D, + CHIP_R828D, + CHIP_R828, + CHIP_R828S, + CHIP_R820C, +}; + +enum r82xx_tuner_type { + TUNER_RADIO = 1, + TUNER_ANALOG_TV, + TUNER_DIGITAL_TV +}; + +enum r82xx_xtal_cap_value { + XTAL_LOW_CAP_30P = 0, + XTAL_LOW_CAP_20P, + XTAL_LOW_CAP_10P, + XTAL_LOW_CAP_0P, + XTAL_HIGH_CAP_0P +}; + +struct r82xx_config { + uint8_t i2c_addr; + uint32_t xtal; + enum r82xx_chip rafael_chip; + unsigned int max_i2c_msg_len; + int use_predetect; +}; + +struct r82xx_priv { + struct r82xx_config *cfg; + + uint8_t regs[NUM_REGS]; + uint8_t buf[NUM_REGS + 1]; + enum r82xx_xtal_cap_value xtal_cap_sel; + uint16_t pll; /* kHz */ + uint32_t int_freq; + uint8_t fil_cal_code; + uint8_t input; + int has_lock; + int init_done; + + /* Store current mode */ + uint32_t delsys; + enum r82xx_tuner_type type; + + uint32_t bw; /* in MHz */ + + void *rtl_dev; +}; + +struct r82xx_freq_range { + uint32_t freq; + uint8_t open_d; + uint8_t rf_mux_ploy; + uint8_t tf_c; + uint8_t xtal_cap20p; + uint8_t xtal_cap10p; + uint8_t xtal_cap0p; +}; + +enum r82xx_delivery_system { + SYS_UNDEFINED, + SYS_DVBT, + SYS_DVBT2, + SYS_ISDBT, +}; + +int r82xx_standby(struct r82xx_priv *priv); +int r82xx_init(struct r82xx_priv *priv); +int r82xx_set_freq(struct r82xx_priv *priv, uint32_t freq); +int r82xx_set_gain(struct r82xx_priv *priv, int set_manual_gain, int gain); +int r82xx_set_bandwidth(struct r82xx_priv *priv, int bandwidth, uint32_t rate); + +#endif -- cgit v1.2.3