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authorFreeArtMan <dos21h@gmail.com>2018-10-14 14:07:48 +0100
committerFreeArtMan <dos21h@gmail.com>2018-10-14 14:07:48 +0100
commit7369b3610373baffa47c049eb7e7c637c02ff9ef (patch)
treedfe8580d75afe2cc10e308bc2fb2a97ecc945636 /cpu8/cpu_add
parent4ea2be2ca3a5945abd6f36d2ac0cb1eb05613a45 (diff)
downloadcpu8-7369b3610373baffa47c049eb7e7c637c02ff9ef.tar.gz
cpu8-7369b3610373baffa47c049eb7e7c637c02ff9ef.zip
Added hello world example
Diffstat (limited to 'cpu8/cpu_add')
-rw-r--r--cpu8/cpu_add/Makefile9
-rw-r--r--cpu8/cpu_add/cpu_and.hpp25
-rw-r--r--cpu8/cpu_add/cpu_and_2.cpp70
-rw-r--r--cpu8/cpu_add/notes.txt24
-rw-r--r--cpu8/cpu_add/trace.dat.vcd47
5 files changed, 175 insertions, 0 deletions
diff --git a/cpu8/cpu_add/Makefile b/cpu8/cpu_add/Makefile
new file mode 100644
index 0000000..ef0884a
--- /dev/null
+++ b/cpu8/cpu_add/Makefile
@@ -0,0 +1,9 @@
+SYSTEMC_PATH=/home/fam/downloads/source/systemc/systemc-2.3.2
+SYSTEMC_INC=$(SYSTEMC_PATH)/src
+SYSTEMC_LIB=$(SYSTEMC_PATH)/src/.libs
+
+PROJECT=cpu_and_2
+
+make:
+ g++ $(PROJECT).cpp -I$(SYSTEMC_INC) -L$(SYSTEMC_LIB) -Wl,-rpath=$(SYSTEMC_LIB)\
+ -o $(PROJECT) -lsystemc -lm \ No newline at end of file
diff --git a/cpu8/cpu_add/cpu_and.hpp b/cpu8/cpu_add/cpu_and.hpp
new file mode 100644
index 0000000..a547f5d
--- /dev/null
+++ b/cpu8/cpu_add/cpu_and.hpp
@@ -0,0 +1,25 @@
+#ifndef __SYSC_CPU_ADD_HPP
+#define __SYSC_CPU_ADD_HPP
+
+#include "systemc.h"
+
+SC_MODULE (cpu_and)
+{
+ sc_in <bool> in_a;
+ sc_in <bool> in_b;
+ sc_out <bool> out_c;
+
+ void do_and()
+ {
+ out_c.write( in_a.read() && in_b.read() );
+ }
+
+ SC_CTOR(cpu_and)
+ {
+ SC_METHOD(do_and);
+ sensitive << in_a << in_b;
+ }
+
+};
+
+#endif \ No newline at end of file
diff --git a/cpu8/cpu_add/cpu_and_2.cpp b/cpu8/cpu_add/cpu_and_2.cpp
new file mode 100644
index 0000000..5a7332a
--- /dev/null
+++ b/cpu8/cpu_add/cpu_and_2.cpp
@@ -0,0 +1,70 @@
+#include <iostream>
+#include <iomanip>
+
+#include "systemc.h"
+#include "systemc"
+#include <sysc/tracing/sc_trace.h>
+#include <sysc/tracing/sc_vcd_trace.h>
+
+#include "cpu_and.hpp"
+
+SC_MODULE(test_cpu_and)
+{
+ sc_out<bool> a,b;
+ sc_in<bool> clk;
+labak
+ void test_cpu_and_stim()
+ {
+ wait();
+ a.write(1);
+ b.write(1);
+ wait();
+
+ a.write(0);
+ b.write(0);
+ wait();
+
+ a.write(1);
+ b.write(0);
+ wait();
+
+ a.write(0);
+ b.write(1);
+ wait();
+
+ sc_stop();
+ }
+
+ SC_CTOR(test_cpu_and)
+ {
+ SC_THREAD(test_cpu_and_stim);
+ sensitive << clk.pos();
+
+ }
+};
+
+int sc_main(int argc, char **argv) {
+ sc_signal<bool> sig_a, sig_b, sig_c;
+ sc_clock TestClk("TestClk", 10, SC_NS, 0.5, 1, SC_NS);
+
+ test_cpu_and Stim1("Stimulus");
+ Stim1.a(sig_a);
+ Stim1.b(sig_b);
+ Stim1.clk(TestClk);
+
+ cpu_and DUT("and");
+ DUT.in_a(sig_a);
+ DUT.in_b(sig_b);
+ DUT.out_c(sig_c);
+
+ sc_trace_file *Tf;
+ Tf = sc_create_vcd_trace_file("trace.dat");
+ sc_trace(Tf, sig_a, "SIG_A");
+ sc_trace(Tf, sig_b, "SIG_B");
+ sc_trace(Tf, sig_c, "SIG_C");
+
+ sc_start();
+ sc_close_vcd_trace_file(Tf);
+
+ return(0);
+} \ No newline at end of file
diff --git a/cpu8/cpu_add/notes.txt b/cpu8/cpu_add/notes.txt
new file mode 100644
index 0000000..62e8b7e
--- /dev/null
+++ b/cpu8/cpu_add/notes.txt
@@ -0,0 +1,24 @@
+https://www.doulos.com/knowhow/systemc/tutorial/modules_and_processes/
+https://www.doulos.com/knowhow/systemc/tutorial/debugging/
+
+
+
+
+#include "systemc.h"
+SC_MODULE(nand2) // declare nand2 sc_module
+{
+ sc_in<bool> A, B; // input signal ports
+ sc_out<bool> F; // output signal ports
+
+ void do_nand2() // a C++ function
+ {
+ F.write( !(A.read() && B.read()) );
+ }
+
+ SC_CTOR(nand2) // constructor for nand2
+ {
+ SC_METHOD(do_nand2); // register do_nand2 with kernel
+ sensitive << A << B; // sensitivity list
+ }
+};
+
diff --git a/cpu8/cpu_add/trace.dat.vcd b/cpu8/cpu_add/trace.dat.vcd
new file mode 100644
index 0000000..039585e
--- /dev/null
+++ b/cpu8/cpu_add/trace.dat.vcd
@@ -0,0 +1,47 @@
+$date
+ Oct 13, 2018 23:25:24
+$end
+
+$version
+ SystemC 2.3.2-Accellera --- Jul 13 2018 19:20:02
+$end
+
+$timescale
+ 1 ps
+$end
+
+$scope module SystemC $end
+$var wire 1 aaaaa SIG_A $end
+$var wire 1 aaaab SIG_B $end
+$var wire 1 aaaac SIG_C $end
+$upscope $end
+$enddefinitions $end
+
+$comment
+All initial values are dumped below at time 0 sec = 0 timescale units.
+$end
+
+$dumpvars
+0aaaaa
+0aaaab
+0aaaac
+$end
+
+#1000
+1aaaaa
+1aaaab
+1aaaac
+
+#11000
+0aaaaa
+0aaaab
+0aaaac
+
+#21000
+1aaaaa
+
+#31000
+0aaaaa
+1aaaab
+
+#41000