Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Different versions of register d-flip-flop, sr-latch, all have issues, ↵ | FreeArtMan | 2018-12-04 | 1 | -4/+4 |
| | | | | becouse of no delay, and cpu_code_reg implemented without gate logic | ||||
* | Add CPU NAND | FreeArtMan | 2018-10-15 | 1 | -0/+25 |