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-rw-r--r--risc_16bit_cpu/v0.1/test.instr16
1 files changed, 16 insertions, 0 deletions
diff --git a/risc_16bit_cpu/v0.1/test.instr b/risc_16bit_cpu/v0.1/test.instr
new file mode 100644
index 0000000..ef81860
--- /dev/null
+++ b/risc_16bit_cpu/v0.1/test.instr
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+0000_0100_0000_0000 // load R0 <- Mem(R2 + 0)
+0000_0100_0100_0001 // load R1 <- Mem(R2 + 1)
+0010_0000_0101_0000 // Add R2 <- R0 + R1
+0001_0010_1000_0000 // Store Mem(R1 + 0) <- R2
+0011_0000_0101_0000 // sub R2 <- R0 - R1
+0100_0000_0101_0000 // invert R2 <- !R0
+0101_0000_0101_0000 // logical shift left R2 <- R0<<R1
+0110_0000_0101_0000 // logical shift right R2 <- R0>>R1
+0111_0000_0101_0000 // AND R2<- R0 AND R1
+1000_0000_0101_0000 // OR R2<- R0 OR R1
+1001_0000_0101_0000 // SLT R2 <- 1 if R0 < R1
+0010_0000_0000_0000 // Add R0 <- R0 + R0
+1011_0000_0100_0001 // BEQ branch to jump if R0=R1, PCnew= PC+2+offset<<1 = 28 => offset = 1
+1100_0000_0100_0000 // BNE branch to jump if R0!=R1, PCnew= PC+2+offset<<1 = 28 => offset = 0
+1101_0000_0000_0000 // J jump to the beginning address
+0000_0100_0000_0000 \ No newline at end of file