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-rw-r--r--md/writeup/makefile_tips.md16
1 files changed, 8 insertions, 8 deletions
diff --git a/md/writeup/makefile_tips.md b/md/writeup/makefile_tips.md
index eee99a1..e9c8077 100644
--- a/md/writeup/makefile_tips.md
+++ b/md/writeup/makefile_tips.md
@@ -5,7 +5,7 @@ keywords:makefile
Makefile working tips. Usual simple makefile
looks like this:
-```
+```Makefile
make:
gcc main.c -o main
```
@@ -13,7 +13,7 @@ make:
but when your project grows and you use more files it becomes
like this:
-```
+```Makefile
make:
gcc -O2 -c file1.c
gcc -O2 -c file2.c
@@ -31,7 +31,7 @@ makefile and it works.
Usually everyone prefer one compiler. And time to time only
check if code compiles with other compilers.
-```
+```Makefile
CC=gcc
make:
$(CC) -O2 -c file1.c
@@ -44,7 +44,7 @@ make:
Every project have unique name and you also would like
to change it if there is need.
-```
+```Makefile
PROJECT=project
CC=gcc
make:
@@ -58,7 +58,7 @@ make:
Usual problem is when some compiling flags causes problems
and you need to change every single entry in file.
-```
+```Makefile
PROJECT=project
CC=gcc
CFLAGS=-O2
@@ -81,7 +81,7 @@ at least 2 lined in makefile.
One of they ways how to reduce number of files edited is to add
new variable where all files is listed:
-```
+```Makefile
PROJECT=project
CC=gcc
CFLAGS=-O2
@@ -103,7 +103,7 @@ Here was added file auto-matching for *.c files to make them *.o
Last thing to add is auto match all *.c in directory.
-```
+```Makefile
PROJECT=project
CC=gcc
CFLAGS=-O2
@@ -123,7 +123,7 @@ Now project makefile can be easily copied and with
changing only one variable value everything should be OK
To run any makefile:
-```
+```sh
make -f makefile_name.mk
```