Removed support for old tunersHEADmaster

10 files changed, 63 insertions, 2813 deletions

diff --git a/include/tuner_e4k.h b/include/tuner_e4k.h
deleted file mode 100644
index 79591ce..0000000
--- a/include/tuner_e4k.h
+++ /dev/null
@@ -1,222 +0,0 @@
-#ifndef _E4K_TUNER_H
-#define _E4K_TUNER_H
-
-/*
- * Elonics E4000 tuner driver
- *
- * (C) 2011-2012 by Harald Welte <laforge@gnumonks.org>
- * (C) 2012 by Sylvain Munaut <tnt@246tNt.com>
- * (C) 2012 by Hoernchen <la@tfc-server.de>
- *
- * All Rights Reserved
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#define E4K_I2C_ADDR	0xc8
-#define E4K_CHECK_ADDR	0x02
-#define E4K_CHECK_VAL	0x40
-
-enum e4k_reg {
-	E4K_REG_MASTER1		= 0x00,
-	E4K_REG_MASTER2		= 0x01,
-	E4K_REG_MASTER3		= 0x02,
-	E4K_REG_MASTER4		= 0x03,
-	E4K_REG_MASTER5		= 0x04,
-	E4K_REG_CLK_INP		= 0x05,
-	E4K_REG_REF_CLK		= 0x06,
-	E4K_REG_SYNTH1		= 0x07,
-	E4K_REG_SYNTH2		= 0x08,
-	E4K_REG_SYNTH3		= 0x09,
-	E4K_REG_SYNTH4		= 0x0a,
-	E4K_REG_SYNTH5		= 0x0b,
-	E4K_REG_SYNTH6		= 0x0c,
-	E4K_REG_SYNTH7		= 0x0d,
-	E4K_REG_SYNTH8		= 0x0e,
-	E4K_REG_SYNTH9		= 0x0f,
-	E4K_REG_FILT1		= 0x10,
-	E4K_REG_FILT2		= 0x11,
-	E4K_REG_FILT3		= 0x12,
-	// gap
-	E4K_REG_GAIN1		= 0x14,
-	E4K_REG_GAIN2		= 0x15,
-	E4K_REG_GAIN3		= 0x16,
-	E4K_REG_GAIN4		= 0x17,
-	// gap
-	E4K_REG_AGC1		= 0x1a,
-	E4K_REG_AGC2		= 0x1b,
-	E4K_REG_AGC3		= 0x1c,
-	E4K_REG_AGC4		= 0x1d,
-	E4K_REG_AGC5		= 0x1e,
-	E4K_REG_AGC6		= 0x1f,
-	E4K_REG_AGC7		= 0x20,
-	E4K_REG_AGC8		= 0x21,
-	// gap
-	E4K_REG_AGC11		= 0x24,
-	E4K_REG_AGC12		= 0x25,
-	// gap
-	E4K_REG_DC1		= 0x29,
-	E4K_REG_DC2		= 0x2a,
-	E4K_REG_DC3		= 0x2b,
-	E4K_REG_DC4		= 0x2c,
-	E4K_REG_DC5		= 0x2d,
-	E4K_REG_DC6		= 0x2e,
-	E4K_REG_DC7		= 0x2f,
-	E4K_REG_DC8		= 0x30,
-	// gap
-	E4K_REG_QLUT0		= 0x50,
-	E4K_REG_QLUT1		= 0x51,
-	E4K_REG_QLUT2		= 0x52,
-	E4K_REG_QLUT3		= 0x53,
-	// gap
-	E4K_REG_ILUT0		= 0x60,
-	E4K_REG_ILUT1		= 0x61,
-	E4K_REG_ILUT2		= 0x62,
-	E4K_REG_ILUT3		= 0x63,
-	// gap
-	E4K_REG_DCTIME1		= 0x70,
-	E4K_REG_DCTIME2		= 0x71,
-	E4K_REG_DCTIME3		= 0x72,
-	E4K_REG_DCTIME4		= 0x73,
-	E4K_REG_PWM1		= 0x74,
-	E4K_REG_PWM2		= 0x75,
-	E4K_REG_PWM3		= 0x76,
-	E4K_REG_PWM4		= 0x77,
-	E4K_REG_BIAS		= 0x78,
-	E4K_REG_CLKOUT_PWDN	= 0x7a,
-	E4K_REG_CHFILT_CALIB	= 0x7b,
-	E4K_REG_I2C_REG_ADDR	= 0x7d,
-	// FIXME
-};
-
-#define E4K_MASTER1_RESET	(1 << 0)
-#define E4K_MASTER1_NORM_STBY	(1 << 1)
-#define E4K_MASTER1_POR_DET	(1 << 2)
-
-#define E4K_SYNTH1_PLL_LOCK	(1 << 0)
-#define E4K_SYNTH1_BAND_SHIF	1
-
-#define E4K_SYNTH7_3PHASE_EN	(1 << 3)
-
-#define E4K_SYNTH8_VCOCAL_UPD	(1 << 2)
-
-#define E4K_FILT3_DISABLE	(1 << 5)
-
-#define E4K_AGC1_LIN_MODE	(1 << 4)
-#define E4K_AGC1_LNA_UPDATE	(1 << 5)
-#define E4K_AGC1_LNA_G_LOW	(1 << 6)
-#define E4K_AGC1_LNA_G_HIGH	(1 << 7)
-
-#define E4K_AGC6_LNA_CAL_REQ	(1 << 4)
-
-#define E4K_AGC7_MIX_GAIN_AUTO	(1 << 0)
-#define E4K_AGC7_GAIN_STEP_5dB	(1 << 5)
-
-#define E4K_AGC8_SENS_LIN_AUTO	(1 << 0)
-
-#define E4K_AGC11_LNA_GAIN_ENH	(1 << 0)
-
-#define E4K_DC1_CAL_REQ		(1 << 0)
-
-#define E4K_DC5_I_LUT_EN	(1 << 0)
-#define E4K_DC5_Q_LUT_EN	(1 << 1)
-#define E4K_DC5_RANGE_DET_EN	(1 << 2)
-#define E4K_DC5_RANGE_EN	(1 << 3)
-#define E4K_DC5_TIMEVAR_EN	(1 << 4)
-
-#define E4K_CLKOUT_DISABLE	0x96
-
-#define E4K_CHFCALIB_CMD	(1 << 0)
-
-#define E4K_AGC1_MOD_MASK	0xF
-
-enum e4k_agc_mode {
-	E4K_AGC_MOD_SERIAL		= 0x0,
-	E4K_AGC_MOD_IF_PWM_LNA_SERIAL	= 0x1,
-	E4K_AGC_MOD_IF_PWM_LNA_AUTONL	= 0x2,
-	E4K_AGC_MOD_IF_PWM_LNA_SUPERV	= 0x3,
-	E4K_AGC_MOD_IF_SERIAL_LNA_PWM	= 0x4,
-	E4K_AGC_MOD_IF_PWM_LNA_PWM	= 0x5,
-	E4K_AGC_MOD_IF_DIG_LNA_SERIAL	= 0x6,
-	E4K_AGC_MOD_IF_DIG_LNA_AUTON	= 0x7,
-	E4K_AGC_MOD_IF_DIG_LNA_SUPERV	= 0x8,
-	E4K_AGC_MOD_IF_SERIAL_LNA_AUTON	= 0x9,
-	E4K_AGC_MOD_IF_SERIAL_LNA_SUPERV = 0xa,
-};
-
-enum e4k_band {
-	E4K_BAND_VHF2	= 0,
-	E4K_BAND_VHF3	= 1,
-	E4K_BAND_UHF	= 2,
-	E4K_BAND_L	= 3,
-};
-
-enum e4k_mixer_filter_bw {
-	E4K_F_MIX_BW_27M	= 0,
-	E4K_F_MIX_BW_4M6	= 8,
-	E4K_F_MIX_BW_4M2	= 9,
-	E4K_F_MIX_BW_3M8	= 10,
-	E4K_F_MIX_BW_3M4	= 11,
-	E4K_F_MIX_BW_3M		= 12,
-	E4K_F_MIX_BW_2M7	= 13,
-	E4K_F_MIX_BW_2M3	= 14,
-	E4K_F_MIX_BW_1M9	= 15,
-};
-
-enum e4k_if_filter {
-	E4K_IF_FILTER_MIX,
-	E4K_IF_FILTER_CHAN,
-	E4K_IF_FILTER_RC
-};
-struct e4k_pll_params {
-	uint32_t fosc;
-	uint32_t intended_flo;
-	uint32_t flo;
-	uint16_t x;
-	uint8_t z;
-	uint8_t r;
-	uint8_t r_idx;
-	uint8_t threephase;
-};
-
-struct e4k_state {
-	void *i2c_dev;
-	uint8_t i2c_addr;
-	enum e4k_band band;
-	struct e4k_pll_params vco;
-	void *rtl_dev;
-};
-
-int e4k_init(struct e4k_state *e4k);
-int e4k_standby(struct e4k_state *e4k, int enable);
-int e4k_if_gain_set(struct e4k_state *e4k, uint8_t stage, int8_t value);
-int e4k_mixer_gain_set(struct e4k_state *e4k, int8_t value);
-int e4k_commonmode_set(struct e4k_state *e4k, int8_t value);
-int e4k_tune_freq(struct e4k_state *e4k, uint32_t freq);
-int e4k_tune_params(struct e4k_state *e4k, struct e4k_pll_params *p);
-uint32_t e4k_compute_pll_params(struct e4k_pll_params *oscp, uint32_t fosc, uint32_t intended_flo);
-int e4k_if_filter_bw_get(struct e4k_state *e4k, enum e4k_if_filter filter);
-int e4k_if_filter_bw_set(struct e4k_state *e4k, enum e4k_if_filter filter,
-		         uint32_t bandwidth);
-int e4k_if_filter_chan_enable(struct e4k_state *e4k, int on);
-int e4k_rf_filter_set(struct e4k_state *e4k);
-
-int e4k_manual_dc_offset(struct e4k_state *e4k, int8_t iofs, int8_t irange, int8_t qofs, int8_t qrange);
-int e4k_dc_offset_calibrate(struct e4k_state *e4k);
-int e4k_dc_offset_gen_table(struct e4k_state *e4k);
-
-int e4k_set_lna_gain(struct e4k_state *e4k, int32_t gain);
-int e4k_enable_manual_gain(struct e4k_state *e4k, uint8_t manual);
-int e4k_set_enh_gain(struct e4k_state *e4k, int32_t gain);
-#endif /* _E4K_TUNER_H */
diff --git a/include/tuner_fc0012.h b/include/tuner_fc0012.h
deleted file mode 100644
index 9dd5356..0000000
--- a/include/tuner_fc0012.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Fitipower FC0012 tuner driver
- *
- * Copyright (C) 2012 Hans-Frieder Vogt <hfvogt@gmx.net>
- *
- * modified for use in librtlsdr
- * Copyright (C) 2012 Steve Markgraf <steve@steve-m.de>
- *
- *    This program is free software; you can redistribute it and/or modify
- *    it under the terms of the GNU General Public License as published by
- *    the Free Software Foundation; either version 2 of the License, or
- *    (at your option) any later version.
- *
- *    This program is distributed in the hope that it will be useful,
- *    but WITHOUT ANY WARRANTY; without even the implied warranty of
- *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *    GNU General Public License for more details.
- *
- *    You should have received a copy of the GNU General Public License
- *    along with this program; if not, write to the Free Software
- *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#ifndef _FC0012_H_
-#define _FC0012_H_
-
-#define FC0012_I2C_ADDR		0xc6
-#define FC0012_CHECK_ADDR	0x00
-#define FC0012_CHECK_VAL	0xa1
-
-int fc0012_init(void *dev);
-int fc0012_set_params(void *dev, uint32_t freq, uint32_t bandwidth);
-int fc0012_set_gain(void *dev, int gain);
-
-#endif
diff --git a/include/tuner_fc0013.h b/include/tuner_fc0013.h
deleted file mode 100644
index 68a26ee..0000000
--- a/include/tuner_fc0013.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Fitipower FC0013 tuner driver
- *
- * Copyright (C) 2012 Hans-Frieder Vogt <hfvogt@gmx.net>
- *
- * modified for use in librtlsdr
- * Copyright (C) 2012 Steve Markgraf <steve@steve-m.de>
- *
- *    This program is free software; you can redistribute it and/or modify
- *    it under the terms of the GNU General Public License as published by
- *    the Free Software Foundation; either version 2 of the License, or
- *    (at your option) any later version.
- *
- *    This program is distributed in the hope that it will be useful,
- *    but WITHOUT ANY WARRANTY; without even the implied warranty of
- *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *    GNU General Public License for more details.
- *
- *    You should have received a copy of the GNU General Public License
- *    along with this program; if not, write to the Free Software
- *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#ifndef _FC0013_H_
-#define _FC0013_H_
-
-#define FC0013_I2C_ADDR		0xc6
-#define FC0013_CHECK_ADDR	0x00
-#define FC0013_CHECK_VAL	0xa3
-
-int fc0013_init(void *dev);
-int fc0013_set_params(void *dev, uint32_t freq, uint32_t bandwidth);
-int fc0013_set_gain_mode(void *dev, int manual);
-int fc0013_set_lna_gain(void *dev, int gain);
-
-#endif
diff --git a/include/tuner_fc2580.h b/include/tuner_fc2580.h
deleted file mode 100644
index 9ebd935..0000000
--- a/include/tuner_fc2580.h
+++ /dev/null
@@ -1,127 +0,0 @@
-#ifndef __TUNER_FC2580_H
-#define __TUNER_FC2580_H
-
-#define	BORDER_FREQ	2600000	//2.6GHz : The border frequency which determines whether Low VCO or High VCO is used
-#define USE_EXT_CLK	0	//0 : Use internal XTAL Oscillator / 1 : Use External Clock input
-#define OFS_RSSI 57
-
-#define FC2580_I2C_ADDR		0xac
-#define FC2580_CHECK_ADDR	0x01
-#define FC2580_CHECK_VAL	0x56
-
-typedef enum {
-	FC2580_UHF_BAND,
-	FC2580_L_BAND,
-	FC2580_VHF_BAND,
-	FC2580_NO_BAND
-} fc2580_band_type;
-
-typedef enum {
-	FC2580_FCI_FAIL,
-	FC2580_FCI_SUCCESS
-} fc2580_fci_result_type;
-
-enum FUNCTION_STATUS
-{
-	FUNCTION_SUCCESS,
-	FUNCTION_ERROR,
-};
-
-extern void fc2580_wait_msec(void *pTuner, int a);
-
-fc2580_fci_result_type fc2580_i2c_write(void *pTuner, unsigned char reg, unsigned char val);
-fc2580_fci_result_type fc2580_i2c_read(void *pTuner, unsigned char reg, unsigned char *read_data);
-
-/*==============================================================================
-       fc2580 initial setting
-
-  This function is a generic function which gets called to initialize
-
-  fc2580 in DVB-H mode or L-Band TDMB mode
-
-  <input parameter>
-
-  ifagc_mode
-    type : integer
-	1 : Internal AGC
-	2 : Voltage Control Mode
-
-==============================================================================*/
-fc2580_fci_result_type fc2580_set_init(void *pTuner, int ifagc_mode, unsigned int freq_xtal );
-
-/*==============================================================================
-       fc2580 frequency setting
-
-  This function is a generic function which gets called to change LO Frequency
-
-  of fc2580 in DVB-H mode or L-Band TDMB mode
-
-  <input parameter>
-
-  f_lo
-	Value of target LO Frequency in 'kHz' unit
-	ex) 2.6GHz = 2600000
-
-==============================================================================*/
-fc2580_fci_result_type fc2580_set_freq(void *pTuner, unsigned int f_lo, unsigned int freq_xtal );
-
-
-/*==============================================================================
-       fc2580 filter BW setting
-
-  This function is a generic function which gets called to change Bandwidth
-
-  frequency of fc2580's channel selection filter
-
-  <input parameter>
-
-  filter_bw
-    1 : 1.53MHz(TDMB)
-	6 : 6MHz
-	7 : 7MHz
-	8 : 7.8MHz
-
-
-==============================================================================*/
-fc2580_fci_result_type fc2580_set_filter( void *pTuner, unsigned char filter_bw, unsigned int freq_xtal );
-
-// The following context is FC2580 tuner API source code
-// Definitions
-
-// AGC mode
-enum FC2580_AGC_MODE
-{
-	FC2580_AGC_INTERNAL = 1,
-	FC2580_AGC_EXTERNAL = 2,
-};
-
-
-// Bandwidth mode
-enum FC2580_BANDWIDTH_MODE
-{
-	FC2580_BANDWIDTH_1530000HZ = 1,
-	FC2580_BANDWIDTH_6000000HZ = 6,
-	FC2580_BANDWIDTH_7000000HZ = 7,
-	FC2580_BANDWIDTH_8000000HZ = 8,
-};
-
-// Manipulaing functions
-int
-fc2580_Initialize(
-	void *pTuner
-	);
-
-int
-fc2580_SetRfFreqHz(
-	void *pTuner,
-	unsigned long RfFreqHz
-	);
-
-// Extra manipulaing functions
-int
-fc2580_SetBandwidthMode(
-	void *pTuner,
-	int BandwidthMode
-	);
-
-#endif
diff --git a/src/librtlsdr.c b/src/librtlsdr.c
index 096abae..538c0dd 100644
--- a/src/librtlsdr.c
+++ b/src/librtlsdr.c
@@ -43,10 +43,10 @@
 #define TWO_POW(n)		((double)(1ULL<<(n)))
 
 #include "rtl-sdr.h"
-#include "tuner_e4k.h"
-#include "tuner_fc0012.h"
-#include "tuner_fc0013.h"
-#include "tuner_fc2580.h"
+//#include "tuner_e4k.h"
+//#include "tuner_fc0012.h"
+//#include "tuner_fc0013.h"
+//#include "tuner_fc2580.h"
 #include "tuner_r82xx.h"
 
 typedef struct rtlsdr_tuner_iface {
@@ -112,7 +112,7 @@ struct rtlsdr_dev {
 	uint32_t offs_freq; /* Hz */
 	int corr; /* ppm */
 	int gain; /* tenth dB */
-	struct e4k_state e4k_s;
+	//struct e4k_state e4k_s;
 	struct r82xx_config r82xx_c;
 	struct r82xx_priv r82xx_p;
 	/* status */
@@ -125,7 +125,7 @@ void rtlsdr_set_gpio_bit(rtlsdr_dev_t *dev, uint8_t gpio, int val);
 static int rtlsdr_set_if_freq(rtlsdr_dev_t *dev, uint32_t freq);
 
 /* generic tuner interface functions, shall be moved to the tuner implementations */
-int e4000_init(void *dev) {
+/*int e4000_init(void *dev) {
 	rtlsdr_dev_t* devt = (rtlsdr_dev_t*)dev;
 	devt->e4k_s.i2c_addr = E4K_I2C_ADDR;
 	rtlsdr_get_xtal_freq(devt, NULL, &devt->e4k_s.vco.fosc);
@@ -150,25 +150,26 @@ int e4000_set_bw(void *dev, int bw) {
 	r |= e4k_if_filter_bw_set(&devt->e4k_s, E4K_IF_FILTER_CHAN, bw);
 
 	return r;
-}
+}*/
 
-int e4000_set_gain(void *dev, int gain) {
-	rtlsdr_dev_t* devt = (rtlsdr_dev_t*)dev;
-	int mixgain = (gain > 340) ? 12 : 4;
+//int e4000_set_gain(void *dev, int gain) {
+//	rtlsdr_dev_t* devt = (rtlsdr_dev_t*)dev;
+//	int mixgain = (gain > 340) ? 12 : 4;
 #if 0
 	int enhgain = (gain - 420);
 #endif
-	if(e4k_set_lna_gain(&devt->e4k_s, min(300, gain - mixgain * 10)) == -EINVAL)
-		return -1;
-	if(e4k_mixer_gain_set(&devt->e4k_s, mixgain) == -EINVAL)
-		return -1;
+//	if(e4k_set_lna_gain(&devt->e4k_s, min(300, gain - mixgain * 10)) == -EINVAL)
+//		return -1;
+//	if(e4k_mixer_gain_set(&devt->e4k_s, mixgain) == -EINVAL)
+//		return -1;
 #if 0 /* enhanced mixer gain seems to have no effect */
 	if(enhgain >= 0)
 		if(e4k_set_enh_gain(&devt->e4k_s, enhgain) == -EINVAL)
 			return -1;
 #endif
-	return 0;
-}
+//	return 0;
+//}
+/*
 int e4000_set_if_gain(void *dev, int stage, int gain) {
 	rtlsdr_dev_t* devt = (rtlsdr_dev_t*)dev;
 	return e4k_if_gain_set(&devt->e4k_s, (uint8_t)stage, (int8_t)(gain / 10));
@@ -176,36 +177,36 @@ int e4000_set_if_gain(void *dev, int stage, int gain) {
 int e4000_set_gain_mode(void *dev, int manual) {
 	rtlsdr_dev_t* devt = (rtlsdr_dev_t*)dev;
 	return e4k_enable_manual_gain(&devt->e4k_s, manual);
-}
+}*/
 
-int _fc0012_init(void *dev) { return fc0012_init(dev); }
-int fc0012_exit(void *dev) { return 0; }
-int fc0012_set_freq(void *dev, uint32_t freq) {
+//int _fc0012_init(void *dev) { return fc0012_init(dev); }
+//int fc0012_exit(void *dev) { return 0; }
+//int fc0012_set_freq(void *dev, uint32_t freq) {
 	/* select V-band/U-band filter */
-	rtlsdr_set_gpio_bit(dev, 6, (freq > 300000000) ? 1 : 0);
-	return fc0012_set_params(dev, freq, 6000000);
-}
-int fc0012_set_bw(void *dev, int bw) { return 0; }
-int _fc0012_set_gain(void *dev, int gain) { return fc0012_set_gain(dev, gain); }
-int fc0012_set_gain_mode(void *dev, int manual) { return 0; }
-
-int _fc0013_init(void *dev) { return fc0013_init(dev); }
-int fc0013_exit(void *dev) { return 0; }
-int fc0013_set_freq(void *dev, uint32_t freq) {
-	return fc0013_set_params(dev, freq, 6000000);
-}
-int fc0013_set_bw(void *dev, int bw) { return 0; }
-int _fc0013_set_gain(void *dev, int gain) { return fc0013_set_lna_gain(dev, gain); }
-
-int fc2580_init(void *dev) { return fc2580_Initialize(dev); }
-int fc2580_exit(void *dev) { return 0; }
-int _fc2580_set_freq(void *dev, uint32_t freq) {
+//	rtlsdr_set_gpio_bit(dev, 6, (freq > 300000000) ? 1 : 0);
+//	return fc0012_set_params(dev, freq, 6000000);
+//}
+//int fc0012_set_bw(void *dev, int bw) { return 0; }
+//int _fc0012_set_gain(void *dev, int gain) { return fc0012_set_gain(dev, gain); }
+//int fc0012_set_gain_mode(void *dev, int manual) { return 0; }
+
+//int _fc0013_init(void *dev) { return fc0013_init(dev); }
+//int fc0013_exit(void *dev) { return 0; }
+//int fc0013_set_freq(void *dev, uint32_t freq) {
+//	return fc0013_set_params(dev, freq, 6000000);
+//}
+//int fc0013_set_bw(void *dev, int bw) { return 0; }
+//int _fc0013_set_gain(void *dev, int gain) { return fc0013_set_lna_gain(dev, gain); }
+
+//int fc2580_init(void *dev) { return fc2580_Initialize(dev); }
+//int fc2580_exit(void *dev) { return 0; }
+/*int _fc2580_set_freq(void *dev, uint32_t freq) {
 	return fc2580_SetRfFreqHz(dev, freq);
 }
 int fc2580_set_bw(void *dev, int bw) { return fc2580_SetBandwidthMode(dev, 1); }
 int fc2580_set_gain(void *dev, int gain) { return 0; }
 int fc2580_set_gain_mode(void *dev, int manual) { return 0; }
-
+*/
 int r820t_init(void *dev) {
 	rtlsdr_dev_t* devt = (rtlsdr_dev_t*)dev;
 	devt->r82xx_p.rtl_dev = dev;
@@ -263,7 +264,7 @@ static rtlsdr_tuner_iface_t tuners[] = {
 	{
 		NULL, NULL, NULL, NULL, NULL, NULL, NULL /* dummy for unknown tuners */
 	},
-	{
+	/*{
 		e4000_init, e4000_exit,
 		e4000_set_freq, e4000_set_bw, e4000_set_gain, e4000_set_if_gain,
 		e4000_set_gain_mode
@@ -282,7 +283,7 @@ static rtlsdr_tuner_iface_t tuners[] = {
 		fc2580_init, fc2580_exit,
 		_fc2580_set_freq, fc2580_set_bw, fc2580_set_gain, NULL,
 		fc2580_set_gain_mode
-	},
+	},*/
 	{
 		r820t_init, r820t_exit,
 		r820t_set_freq, r820t_set_bw, r820t_set_gain, NULL,
@@ -747,8 +748,10 @@ int rtlsdr_set_xtal_freq(rtlsdr_dev_t *dev, uint32_t rtl_freq, uint32_t tuner_fr
 			dev->tun_xtal = tuner_freq;
 
 		/* read corrected clock value into e4k and r82xx structure */
-		if (rtlsdr_get_xtal_freq(dev, NULL, &dev->e4k_s.vco.fosc) ||
+		/*if (rtlsdr_get_xtal_freq(dev, NULL, &dev->e4k_s.vco.fosc) ||
 		    rtlsdr_get_xtal_freq(dev, NULL, &dev->r82xx_c.xtal))
+			return -3;*/
+		if (rtlsdr_get_xtal_freq(dev, NULL, &dev->r82xx_c.xtal))
 			return -3;
 
 		/* update xtal-dependent settings */
@@ -925,9 +928,11 @@ int rtlsdr_set_freq_correction(rtlsdr_dev_t *dev, int ppm)
 	r |= rtlsdr_set_sample_freq_correction(dev, ppm);
 
 	/* read corrected clock value into e4k and r82xx structure */
-	if (rtlsdr_get_xtal_freq(dev, NULL, &dev->e4k_s.vco.fosc) ||
+	/*if (rtlsdr_get_xtal_freq(dev, NULL, &dev->e4k_s.vco.fosc) ||
 	    rtlsdr_get_xtal_freq(dev, NULL, &dev->r82xx_c.xtal))
-		return -3;
+		return -3;*/
+	if (rtlsdr_get_xtal_freq(dev, NULL, &dev->r82xx_c.xtal))
+		return -3;	
 
 	if (dev->freq) /* retune to apply new correction value */
 		r |= rtlsdr_set_center_freq(dev, dev->freq);
@@ -954,13 +959,13 @@ enum rtlsdr_tuner rtlsdr_get_tuner_type(rtlsdr_dev_t *dev)
 int rtlsdr_get_tuner_gains(rtlsdr_dev_t *dev, int *gains)
 {
 	/* all gain values are expressed in tenths of a dB */
-	const int e4k_gains[] = { -10, 15, 40, 65, 90, 115, 140, 165, 190, 215,
+	/*const int e4k_gains[] = { -10, 15, 40, 65, 90, 115, 140, 165, 190, 215,
 				  240, 290, 340, 420 };
 	const int fc0012_gains[] = { -99, -40, 71, 179, 192 };
 	const int fc0013_gains[] = { -99, -73, -65, -63, -60, -58, -54, 58, 61,
 				       63, 65, 67, 68, 70, 71, 179, 181, 182,
-				       184, 186, 188, 191, 197 };
-	const int fc2580_gains[] = { 0 /* no gain values */ };
+				       184, 186, 188, 191, 197 };*/
+	//const int fc2580_gains[] = { 0 /* no gain values */ };
 	const int r82xx_gains[] = { 0, 9, 14, 27, 37, 77, 87, 125, 144, 157,
 				     166, 197, 207, 229, 254, 280, 297, 328,
 				     338, 364, 372, 386, 402, 421, 434, 439,
@@ -974,7 +979,7 @@ int rtlsdr_get_tuner_gains(rtlsdr_dev_t *dev, int *gains)
 		return -1;
 
 	switch (dev->tuner_type) {
-	case RTLSDR_TUNER_E4000:
+	/*case RTLSDR_TUNER_E4000:
 		ptr = e4k_gains; len = sizeof(e4k_gains);
 		break;
 	case RTLSDR_TUNER_FC0012:
@@ -985,7 +990,7 @@ int rtlsdr_get_tuner_gains(rtlsdr_dev_t *dev, int *gains)
 		break;
 	case RTLSDR_TUNER_FC2580:
 		ptr = fc2580_gains; len = sizeof(fc2580_gains);
-		break;
+		break;*/
 	case RTLSDR_TUNER_R820T:
 	case RTLSDR_TUNER_R828D:
 		ptr = r82xx_gains; len = sizeof(r82xx_gains);
@@ -1531,19 +1536,22 @@ int rtlsdr_open(rtlsdr_dev_t **out_dev, uint32_t index)
 	/* Probe tuners */
 	rtlsdr_set_i2c_repeater(dev, 1);
 
+	/*
 	reg = rtlsdr_i2c_read_reg(dev, E4K_I2C_ADDR, E4K_CHECK_ADDR);
 	if (reg == E4K_CHECK_VAL) {
 		fprintf(stderr, "Found Elonics E4000 tuner\n");
 		dev->tuner_type = RTLSDR_TUNER_E4000;
 		goto found;
 	}
+	*/
 
+	/*
 	reg = rtlsdr_i2c_read_reg(dev, FC0013_I2C_ADDR, FC0013_CHECK_ADDR);
 	if (reg == FC0013_CHECK_VAL) {
 		fprintf(stderr, "Found Fitipower FC0013 tuner\n");
 		dev->tuner_type = RTLSDR_TUNER_FC0013;
 		goto found;
-	}
+	}*/
 
 	reg = rtlsdr_i2c_read_reg(dev, R820T_I2C_ADDR, R82XX_CHECK_ADDR);
 	if (reg == R82XX_CHECK_VAL) {
@@ -1566,20 +1574,23 @@ int rtlsdr_open(rtlsdr_dev_t **out_dev, uint32_t index)
 	rtlsdr_set_gpio_bit(dev, 4, 1);
 	rtlsdr_set_gpio_bit(dev, 4, 0);
 
+	/*
 	reg = rtlsdr_i2c_read_reg(dev, FC2580_I2C_ADDR, FC2580_CHECK_ADDR);
 	if ((reg & 0x7f) == FC2580_CHECK_VAL) {
 		fprintf(stderr, "Found FCI 2580 tuner\n");
 		dev->tuner_type = RTLSDR_TUNER_FC2580;
 		goto found;
 	}
+	*/
 
+	/*
 	reg = rtlsdr_i2c_read_reg(dev, FC0012_I2C_ADDR, FC0012_CHECK_ADDR);
 	if (reg == FC0012_CHECK_VAL) {
 		fprintf(stderr, "Found Fitipower FC0012 tuner\n");
 		rtlsdr_set_gpio_output(dev, 6);
 		dev->tuner_type = RTLSDR_TUNER_FC0012;
 		goto found;
-	}
+	}*/
 
 found:
 	/* use the rtl clock value by default */
diff --git a/src/make.mk b/src/make.mk
index 33d9033..938f3d7 100644
--- a/src/make.mk
+++ b/src/make.mk
@@ -1,7 +1,7 @@
 DIR_SRC=src
 SRC_LIB += $(wildcard $(DIR_SRC)/*.c)
 OBJ_LIB += $(SRC_LIB:.c=.o)
-LDFLAGS_LIB=`pkg-config --libs libusb` -lc
+LDFLAGS_LIB=`pkg-config --libs libusb` -lc 
 
 $(DIR_SRC)-lib-o: $(OBJ_LIB)
 
diff --git a/src/tuner_e4k.c b/src/tuner_e4k.c
deleted file mode 100644
index 400e745..0000000
--- a/src/tuner_e4k.c
+++ /dev/null
@@ -1,1000 +0,0 @@
-/*
- * Elonics E4000 tuner driver
- *
- * (C) 2011-2012 by Harald Welte <laforge@gnumonks.org>
- * (C) 2012 by Sylvain Munaut <tnt@246tNt.com>
- * (C) 2012 by Hoernchen <la@tfc-server.de>
- *
- * All Rights Reserved
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <limits.h>
-#include <stdint.h>
-#include <errno.h>
-#include <string.h>
-#include <stdio.h>
-
-#include <reg_field.h>
-#include <tuner_e4k.h>
-#include <rtlsdr_i2c.h>
-
-#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
-
-/* If this is defined, the limits are somewhat relaxed compared to what the
- * vendor claims is possible */
-#define OUT_OF_SPEC
-
-#define MHZ(x)	((x)*1000*1000)
-#define KHZ(x)	((x)*1000)
-
-uint32_t unsigned_delta(uint32_t a, uint32_t b)
-{
-	if (a > b)
-		return a - b;
-	else
-		return b - a;
-}
-
-/* look-up table bit-width -> mask */
-static const uint8_t width2mask[] = {
-	0, 1, 3, 7, 0xf, 0x1f, 0x3f, 0x7f, 0xff
-};
-
-/***********************************************************************
- * Register Access */
-
-/*! \brief Write a register of the tuner chip
- *  \param[in] e4k reference to the tuner
- *  \param[in] reg number of the register
- *  \param[in] val value to be written
- *  \returns 0 on success, negative in case of error
- */
-static int e4k_reg_write(struct e4k_state *e4k, uint8_t reg, uint8_t val)
-{
-	int r;
-	uint8_t data[2];
-	data[0] = reg;
-	data[1] = val;
-
-	r = rtlsdr_i2c_write_fn(e4k->rtl_dev, e4k->i2c_addr, data, 2);
-	return r == 2 ? 0 : -1;
-}
-
-/*! \brief Read a register of the tuner chip
- *  \param[in] e4k reference to the tuner
- *  \param[in] reg number of the register
- *  \returns positive 8bit register contents on success, negative in case of error
- */
-static int e4k_reg_read(struct e4k_state *e4k, uint8_t reg)
-{
-	uint8_t data = reg;
-
-	if (rtlsdr_i2c_write_fn(e4k->rtl_dev, e4k->i2c_addr, &data, 1) < 1)
-		return -1;
-
-	if (rtlsdr_i2c_read_fn(e4k->rtl_dev, e4k->i2c_addr, &data, 1) < 1)
-		return -1;
-
-	return data;
-}
-
-/*! \brief Set or clear some (masked) bits inside a register
- *  \param[in] e4k reference to the tuner
- *  \param[in] reg number of the register
- *  \param[in] mask bit-mask of the value
- *  \param[in] val data value to be written to register
- *  \returns 0 on success, negative in case of error
- */
-static int e4k_reg_set_mask(struct e4k_state *e4k, uint8_t reg,
-		     uint8_t mask, uint8_t val)
-{
-	uint8_t tmp = e4k_reg_read(e4k, reg);
-
-	if ((tmp & mask) == val)
-		return 0;
-
-	return e4k_reg_write(e4k, reg, (tmp & ~mask) | (val & mask));
-}
-
-/*! \brief Write a given field inside a register
- *  \param[in] e4k reference to the tuner
- *  \param[in] field structure describing the field
- *  \param[in] val value to be written
- *  \returns 0 on success, negative in case of error
- */
-static int e4k_field_write(struct e4k_state *e4k, const struct reg_field *field, uint8_t val)
-{
-	int rc;
-	uint8_t mask;
-
-	rc = e4k_reg_read(e4k, field->reg);
-	if (rc < 0)
-		return rc;
-
-	mask = width2mask[field->width] << field->shift;
-
-	return e4k_reg_set_mask(e4k, field->reg, mask, val << field->shift);
-}
-
-/*! \brief Read a given field inside a register
- *  \param[in] e4k reference to the tuner
- *  \param[in] field structure describing the field
- *  \returns positive value of the field, negative in case of error
- */
-static int e4k_field_read(struct e4k_state *e4k, const struct reg_field *field)
-{
-	int rc;
-
-	rc = e4k_reg_read(e4k, field->reg);
-	if (rc < 0)
-		return rc;
-
-	rc = (rc >> field->shift) & width2mask[field->width];
-
-	return rc;
-}
-
-/***********************************************************************
- * Filter Control */
-
-static const uint32_t rf_filt_center_uhf[] = {
-	MHZ(360), MHZ(380), MHZ(405), MHZ(425),
-	MHZ(450), MHZ(475), MHZ(505), MHZ(540),
-	MHZ(575), MHZ(615), MHZ(670), MHZ(720),
-	MHZ(760), MHZ(840), MHZ(890), MHZ(970)
-};
-
-static const uint32_t rf_filt_center_l[] = {
-	MHZ(1300), MHZ(1320), MHZ(1360), MHZ(1410),
-	MHZ(1445), MHZ(1460), MHZ(1490), MHZ(1530),
-	MHZ(1560), MHZ(1590), MHZ(1640), MHZ(1660),
-	MHZ(1680), MHZ(1700), MHZ(1720), MHZ(1750)
-};
-
-static int closest_arr_idx(const uint32_t *arr, unsigned int arr_size, uint32_t freq)
-{
-	unsigned int i, bi = 0;
-	uint32_t best_delta = 0xffffffff;
-
-	/* iterate over the array containing a list of the center
-	 * frequencies, selecting the closest one */
-	for (i = 0; i < arr_size; i++) {
-		uint32_t delta = unsigned_delta(freq, arr[i]);
-		if (delta < best_delta) {
-			best_delta = delta;
-			bi = i;
-		}
-	}
-
-	return bi;
-}
-
-/* return 4-bit index as to which RF filter to select */
-static int choose_rf_filter(enum e4k_band band, uint32_t freq)
-{
-	int rc;
-
-	switch (band) {
-		case E4K_BAND_VHF2:
-		case E4K_BAND_VHF3:
-			rc = 0;
-			break;
-		case E4K_BAND_UHF:
-			rc = closest_arr_idx(rf_filt_center_uhf,
-						 ARRAY_SIZE(rf_filt_center_uhf),
-						 freq);
-			break;
-		case E4K_BAND_L:
-			rc = closest_arr_idx(rf_filt_center_l,
-						 ARRAY_SIZE(rf_filt_center_l),
-						 freq);
-			break;
-		default:
-			rc = -EINVAL;
-			break;
-	}
-
-	return rc;
-}
-
-/* \brief Automatically select apropriate RF filter based on e4k state */
-int e4k_rf_filter_set(struct e4k_state *e4k)
-{
-	int rc;
-
-	rc = choose_rf_filter(e4k->band, e4k->vco.flo);
-	if (rc < 0)
-		return rc;
-
-	return e4k_reg_set_mask(e4k, E4K_REG_FILT1, 0xF, rc);
-}
-
-/* Mixer Filter */
-static const uint32_t mix_filter_bw[] = {
-	KHZ(27000), KHZ(27000), KHZ(27000), KHZ(27000),
-	KHZ(27000), KHZ(27000), KHZ(27000), KHZ(27000),
-	KHZ(4600), KHZ(4200), KHZ(3800), KHZ(3400),
-	KHZ(3300), KHZ(2700), KHZ(2300), KHZ(1900)
-};
-
-/* IF RC Filter */
-static const uint32_t ifrc_filter_bw[] = {
-	KHZ(21400), KHZ(21000), KHZ(17600), KHZ(14700),
-	KHZ(12400), KHZ(10600), KHZ(9000), KHZ(7700),
-	KHZ(6400), KHZ(5300), KHZ(4400), KHZ(3400),
-	KHZ(2600), KHZ(1800), KHZ(1200), KHZ(1000)
-};
-
-/* IF Channel Filter */
-static const uint32_t ifch_filter_bw[] = {
-	KHZ(5500), KHZ(5300), KHZ(5000), KHZ(4800),
-	KHZ(4600), KHZ(4400), KHZ(4300), KHZ(4100),
-	KHZ(3900), KHZ(3800), KHZ(3700), KHZ(3600),
-	KHZ(3400), KHZ(3300), KHZ(3200), KHZ(3100),
-	KHZ(3000), KHZ(2950), KHZ(2900), KHZ(2800),
-	KHZ(2750), KHZ(2700), KHZ(2600), KHZ(2550),
-	KHZ(2500), KHZ(2450), KHZ(2400), KHZ(2300),
-	KHZ(2280), KHZ(2240), KHZ(2200), KHZ(2150)
-};
-
-static const uint32_t *if_filter_bw[] = {
-	mix_filter_bw,
-	ifch_filter_bw,
-	ifrc_filter_bw,
-};
-
-static const uint32_t if_filter_bw_len[] = {
-	ARRAY_SIZE(mix_filter_bw),
-	ARRAY_SIZE(ifch_filter_bw),
-	ARRAY_SIZE(ifrc_filter_bw),
-};
-
-static const struct reg_field if_filter_fields[] = {
-	{
-		E4K_REG_FILT2, 4, 4,
-	},
-	{
-		E4K_REG_FILT3, 0, 5,
-	},
-	{
-		E4K_REG_FILT2, 0, 4,
-	}
-};
-
-static int find_if_bw(enum e4k_if_filter filter, uint32_t bw)
-{
-	if (filter >= ARRAY_SIZE(if_filter_bw))
-		return -EINVAL;
-
-	return closest_arr_idx(if_filter_bw[filter],
-			       if_filter_bw_len[filter], bw);
-}
-
-/*! \brief Set the filter band-width of any of the IF filters
- *  \param[in] e4k reference to the tuner chip
- *  \param[in] filter filter to be configured
- *  \param[in] bandwidth bandwidth to be configured
- *  \returns positive actual filter band-width, negative in case of error
- */
-int e4k_if_filter_bw_set(struct e4k_state *e4k, enum e4k_if_filter filter,
-		         uint32_t bandwidth)
-{
-	int bw_idx;
-	const struct reg_field *field;
-
-	if (filter >= ARRAY_SIZE(if_filter_bw))
-		return -EINVAL;
-
-	bw_idx = find_if_bw(filter, bandwidth);
-
-	field = &if_filter_fields[filter];
-
-	return e4k_field_write(e4k, field, bw_idx);
-}
-
-/*! \brief Enables / Disables the channel filter
- *  \param[in] e4k reference to the tuner chip
- *  \param[in] on 1=filter enabled, 0=filter disabled
- *  \returns 0 success, negative errors
- */
-int e4k_if_filter_chan_enable(struct e4k_state *e4k, int on)
-{
-	return e4k_reg_set_mask(e4k, E4K_REG_FILT3, E4K_FILT3_DISABLE,
-	                        on ? 0 : E4K_FILT3_DISABLE);
-}
-
-int e4k_if_filter_bw_get(struct e4k_state *e4k, enum e4k_if_filter filter)
-{
-	const uint32_t *arr;
-	int rc;
-	const struct reg_field *field;
-
-	if (filter >= ARRAY_SIZE(if_filter_bw))
-		return -EINVAL;
-
-	field = &if_filter_fields[filter];
-
-	rc = e4k_field_read(e4k, field);
-	if (rc < 0)
-		return rc;
-
-	arr = if_filter_bw[filter];
-
-	return arr[rc];
-}
-
-
-/***********************************************************************
- * Frequency Control */
-
-#define E4K_FVCO_MIN_KHZ	2600000	/* 2.6 GHz */
-#define E4K_FVCO_MAX_KHZ	3900000	/* 3.9 GHz */
-#define E4K_PLL_Y		65536
-
-#ifdef OUT_OF_SPEC
-#define E4K_FLO_MIN_MHZ		50
-#define E4K_FLO_MAX_MHZ		2200UL
-#else
-#define E4K_FLO_MIN_MHZ		64
-#define E4K_FLO_MAX_MHZ		1700
-#endif
-
-struct pll_settings {
-	uint32_t freq;
-	uint8_t reg_synth7;
-	uint8_t mult;
-};
-
-static const struct pll_settings pl