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| author | FreeArtMan <dos21h@gmail.com> | 2018-12-04 21:22:39 +0000 |
|---|---|---|
| committer | FreeArtMan <dos21h@gmail.com> | 2018-12-04 21:22:39 +0000 |
| commit | 3e1eb700dd4fc8dc47772ff7942990e61dcde32e (patch) | |
| tree | 18cc811e52e9da514cea531ec70c652250be8ccd /cpu8_spec/ISA_CPU8_0_0_4.md | |
| parent | 7e00e4960af68e6c26104cca26cdf47f4f4095a7 (diff) | |
| download | cpu8-3e1eb700dd4fc8dc47772ff7942990e61dcde32e.tar.gz cpu8-3e1eb700dd4fc8dc47772ff7942990e61dcde32e.zip | |
Different versions of register d-flip-flop, sr-latch, all have issues, becouse of no delay, and cpu_code_reg implemented without gate logic
Diffstat (limited to 'cpu8_spec/ISA_CPU8_0_0_4.md')
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