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path: root/and/v0.1/Makefile
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make:
	iverilog -g2005-sv -o and and.v
	iverilog -g2005-sv -o and8 and8.v
	iverilog -g2005-sv -o alu alu.v
	iverilog -g2005-sv -o test_and testbench.v and.v and8.v 
	iverilog -g2005-sv -o test_and8 testbench_and8.v and8.v 
	iverilog -g2005-sv -o test_alu testbench_alu.v alu.v

test:
	vvp test_and

test_and8:
	vvp test_and8

test_alu:
	vvp test_alu

wave:
	gtkwave test_and.vcd