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I_INSTRMEM=-I../../instrmem/v0.1 ../../instrmem/v0.1/instr_memory.v
I_GPR=-I../../gpr/v0.1 ../../gpr/v0.1/gpr_register.v
I_ALUCONTROL=-I../../alu_control/v0.1 ../../alu_control/v0.1/alu_control.v
I_ALU8=-I../../alu/v0.1_16bit ../../alu/v0.1_16bit/alu.v
I_DATAMEM=-I../../datamem/v0.1 ../../datamem/v0.1/data_memory.v
I_CONTROLUNIT=-I../../control_unit/v0.1 ../../control_unit/v0.1/control_unit.v
I_DATAPATH=-I../../datapath/v0.1 ../../datapath/v0.1/data_path.v
make:
iverilog -g2005-sv -o risc_16bit_cpu risc_16bit_cpu.v $(I_INSTRMEM) $(I_GPR) $(I_ALUCONTROL) $(I_ALU8) $(I_DATAMEM) $(I_CONTROLUNIT) $(I_DATAPATH)
iverilog -g2005-sv -o test_risc_16bit_cpu test_risc_16bit_cpu.v risc_16bit_cpu.v $(I_INSTRMEM) $(I_GPR) $(I_ALUCONTROL) $(I_ALU8) $(I_DATAMEM) $(I_CONTROLUNIT) $(I_DATAPATH)
test:
./test_risc_16bit_cpu
wave:
gtkwave test_risc_16bit_cpu.vcd
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