Different versions of register d-flip-flop, sr-latch, all have issues, becouse of no delay, and cpu_code_reg implemented without gate logic

3 files changed, 171 insertions, 0 deletions

diff --git a/cpu8/cpu_gatedlatch/Makefile b/cpu8/cpu_gatedlatch/Makefile
new file mode 100644
index 0000000..8fa3701
--- /dev/null
+++ b/cpu8/cpu_gatedlatch/Makefile
@@ -0,0 +1,12 @@
+SYSTEMC_PATH=/home/fam/downloads/source/systemc/systemc-2.3.2
+SYSTEMC_INC=$(SYSTEMC_PATH)/src
+SYSTEMC_LIB=$(SYSTEMC_PATH)/src/.libs
+
+PROJECT=cpu_gatedlatch
+
+make:
+	g++ $(PROJECT).cpp -I$(SYSTEMC_INC) -L$(SYSTEMC_LIB) -Wl,-rpath=$(SYSTEMC_LIB)\
+		-o $(PROJECT) -lsystemc -lm
+
+
+
diff --git a/cpu8/cpu_gatedlatch/cpu_gatedlatch.cpp b/cpu8/cpu_gatedlatch/cpu_gatedlatch.cpp
new file mode 100644
index 0000000..b489e5b
--- /dev/null
+++ b/cpu8/cpu_gatedlatch/cpu_gatedlatch.cpp
@@ -0,0 +1,96 @@
+#include <iostream>
+#include <iomanip>
+
+#include "systemc.h"
+#include "systemc"
+#include <sysc/tracing/sc_trace.h>
+#include <sysc/tracing/sc_vcd_trace.h>
+
+#include "cpu_gatedlatch.hpp"
+
+SC_MODULE(test_cpu_gatedlatch)
+{
+	sc_out<bool> d,e;
+	sc_in<bool> clk;
+
+	void test_cpu_gatedlatch_stim()
+	{
+		wait();
+		d.write(0);
+		e.write(0);
+
+		wait();
+		d.write(1);
+		e.write(0);
+
+		wait();
+		d.write(0);
+		e.write(1);
+
+		wait();
+		d.write(1);
+		e.write(1);
+
+		wait();
+		d.write(0);
+		e.write(0);
+
+		wait();
+		d.write(1);
+		e.write(0);
+
+		wait();
+		d.write(0);
+		e.write(1);
+
+		wait();
+		d.write(0);
+		e.write(0);
+
+
+		wait();
+
+		sc_stop();
+	}
+
+	SC_CTOR(test_cpu_gatedlatch)
+	{
+		SC_THREAD(test_cpu_gatedlatch_stim);
+		sensitive << clk.pos();
+
+	}
+};
+
+
+int sc_main(int argc, char **argv) {
+	int i;
+	sc_signal<bool> sig_in_d,sig_in_e, sig_out_q, sig_out_nq;
+	sc_clock TestClk("TestClk", 10, SC_NS, 0.5, 1, SC_NS);
+
+	test_cpu_gatedlatch Stim1("Stimulus");
+	Stim1.e(sig_in_e);
+	Stim1.d(sig_in_d);
+	Stim1.clk(TestClk);
+
+
+	
+	cpu_gatedlatch DUT("cpu_gatedlatch");
+	DUT.in_d(sig_in_d);
+	DUT.in_e(sig_in_e);
+	DUT.out_q(sig_out_q);
+	DUT.out_nq(sig_out_nq);
+
+	
+	sc_trace_file *Tf;
+	
+	Tf = sc_create_vcd_trace_file("trace_cpu_gatedlatch.dat");
+	sc_trace(Tf, sig_in_d, "D");
+	sc_trace(Tf, sig_in_e, "E");
+	sc_trace(Tf, sig_out_q, "Q");
+	sc_trace(Tf, sig_out_nq, "NQ");
+
+	sc_start();
+	sc_close_vcd_trace_file(Tf);
+
+	return(0);
+}
\ No newline at end of file
diff --git a/cpu8/cpu_gatedlatch/cpu_gatedlatch.hpp b/cpu8/cpu_gatedlatch/cpu_gatedlatch.hpp
new file mode 100644
index 0000000..d3f314f
--- /dev/null
+++ b/cpu8/cpu_gatedlatch/cpu_gatedlatch.hpp
@@ -0,0 +1,63 @@
+#ifndef __SYSC_CPU_GATEDLATCH_HPP
+#define __SYSC_CPU_GATEDLATCH_HPP
+
+#include "systemc.h"
+#include "../cpu_nand/cpu_nand.hpp"
+
+SC_MODULE (cpu_gatedlatch) 
+{
+	//Inputs
+	sc_in <bool> in_d;
+	sc_in <bool> in_e;
+	sc_out <bool> out_q,out_nq;
+
+	cpu_nand *nand1, *nand2, *nand3, *nand4, *nand5;
+
+	sc_signal<bool> sig_nand1nand3;
+	sc_signal<bool> sig_nand2nand4;
+	sc_signal<bool> sig_nand3nand5;
+	sc_signal<bool> sig_qnand5, sig_nqnand4;
+
+	void do_gatedlatch()
+	{
+
+	}
+
+	SC_CTOR(cpu_gatedlatch)
+	{
+
+		nand1 = new cpu_nand("NAND1");
+		nand2 = new cpu_nand("NAND2");
+		nand3 = new cpu_nand("NAND3");
+		nand4 = new cpu_nand("NAND4");
+		nand5 = new cpu_nand("NAND5");
+
+		nand1->in_a(in_d);
+		nand1->in_b(in_d);
+		nand1->out_c(sig_nand1nand3);
+
+		nand2->in_a(in_d);
+		nand2->in_b(in_e);
+		nand2->out_c(sig_nand2nand4);
+
+		nand3->in_a(in_e);
+		nand3->in_b(sig_nand1nand3);
+		nand3->out_c(sig_nand3nand5);
+
+		nand4->in_a(sig_nand2nand4);
+		nand4->in_b(sig_nqnand4);
+		nand4->out_c(out_q);
+		nand4->out_c(sig_qnand5);
+
+		nand5->in_a(sig_qnand5);
+		nand5->in_b(sig_nand3nand5);
+		nand5->out_c(out_nq);
+		nand5->out_c(sig_nqnand4);
+
+		//SC_METHOD(do_gatedlatch);
+		//sensitive << in_d << in_clk;
+	}
+
+};
+
+#endif
\ No newline at end of file