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| author | dianshi <dianshi@main.lv> | 2022-01-25 21:37:30 +0000 |
|---|---|---|
| committer | dianshi <dianshi@main.lv> | 2022-01-25 21:37:30 +0000 |
| commit | 2cbdc8a905d6b4fac757ae6a33f75548b16f10e7 (patch) | |
| tree | 138402f00d7e675e8c6bc80a66d56a7e8b7c7c58 /alu_control/v0.1/alu_control.v | |
| parent | 8661ed2084e8d50ef19a2827484fefd07c4f20e1 (diff) | |
| download | cpu8_v-2cbdc8a905d6b4fac757ae6a33f75548b16f10e7.tar.gz cpu8_v-2cbdc8a905d6b4fac757ae6a33f75548b16f10e7.zip | |
Add alu_control version v0.1
Diffstat (limited to 'alu_control/v0.1/alu_control.v')
| -rw-r--r-- | alu_control/v0.1/alu_control.v | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/alu_control/v0.1/alu_control.v b/alu_control/v0.1/alu_control.v new file mode 100644 index 0000000..fb6a743 --- /dev/null +++ b/alu_control/v0.1/alu_control.v @@ -0,0 +1,26 @@ +module alu_control( + input [1:0] alu_op, + input [3:0] opcode, + output reg [2:0] alu_cnt + +); + +wire [5:0]alu_control_in; +assign alu_control_in = {alu_op, opcode}; + +always @(alu_control_in) +casex (alu_control_in) + 6'b10xxxx: alu_cnt=3'b000; + 6'b01xxxx: alu_cnt=3'b001; + 6'b000010: alu_cnt=3'b000; + 6'b000011: alu_cnt=3'b001; + 6'b000100: alu_cnt=3'b010; + 6'b000101: alu_cnt=3'b011; + 6'b000110: alu_cnt=3'b100; + 6'b000111: alu_cnt=3'b101; + 6'b001000: alu_cnt=3'b110; + 6'b001001: alu_cnt=3'b111; + default: alu_cnt=3'b000; +endcase + +endmodule
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