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path: root/risc_16bit_cpu/v0.1/Makefile
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make:
	iverilog -g2005-sv -o alu_8 alu_8.v
	iverilog -g2005-sv -o data_memory data_memory.v
	iverilog -g2005-sv -o instr_memory instr_memory.v
	iverilog -g2005-sv -o gpr_register gpr_register.v
	iverilog -g2005-sv -o alu_control alu_control.v
	iverilog -g2005-sv -o data_path data_path.v instr_memory.v gpr_register.v alu_control.v alu_8.v data_memory.v
	iverilog -g2005-sv -o control_unit control_unit.v
	iverilog -g2005-sv -o risc_16bit_cpu risc_16bit_cpu.v control_unit.v data_path.v instr_memory.v gpr_register.v alu_control.v alu_8.v data_memory.v
	iverilog -g2005-sv -o test_data_memory data_memory.v test_data_memory.v
	iverilog -g2005-sv -o test_instr_memory instr_memory.v test_instr_memory.v
	iverilog -g2005-sv -o test_gpr_register gpr_register.v test_gpr_register.v
	iverilog -g2005-sv -o test_alu_control alu_control.v test_alu_control.v
	iverilog -g2005-sv -o test_data_path data_path.v test_data_path.v instr_memory.v gpr_register.v alu_control.v alu_8.v data_memory.v
	iverilog -g2005-sv -o test_risc_16bit_cpu test_risc_16bit_cpu.v risc_16bit_cpu.v control_unit.v data_path.v instr_memory.v gpr_register.v alu_control.v alu_8.v data_memory.v

test:
	./test_data_memory
	./test_instr_memory
	./test_gpr_register
	./test_alu_control
	./test_data_path
	./test_risc_16bit_cpu

wave:
	gtkwave test_data_path.vcd