Added CPU FULL_ADDER

3 files changed, 202 insertions, 0 deletions

diff --git a/cpu8/cpu_full_adder/Makefile b/cpu8/cpu_full_adder/Makefile
new file mode 100644
index 0000000..2a67548
--- /dev/null
+++ b/cpu8/cpu_full_adder/Makefile
@@ -0,0 +1,12 @@
+SYSTEMC_PATH=/home/fam/downloads/source/systemc/systemc-2.3.2
+SYSTEMC_INC=$(SYSTEMC_PATH)/src
+SYSTEMC_LIB=$(SYSTEMC_PATH)/src/.libs
+
+PROJECT=cpu_full_adder
+
+make:
+	g++ $(PROJECT).cpp -I$(SYSTEMC_INC) -L$(SYSTEMC_LIB) -Wl,-rpath=$(SYSTEMC_LIB)\
+		-o $(PROJECT) -lsystemc -lm
+
+
+
diff --git a/cpu8/cpu_full_adder/cpu_full_adder.cpp b/cpu8/cpu_full_adder/cpu_full_adder.cpp
new file mode 100644
index 0000000..87815d8
--- /dev/null
+++ b/cpu8/cpu_full_adder/cpu_full_adder.cpp
@@ -0,0 +1,100 @@
+#include <iostream>
+#include <iomanip>
+
+#include "systemc.h"
+#include "systemc"
+#include <sysc/tracing/sc_trace.h>
+#include <sysc/tracing/sc_vcd_trace.h>
+
+#include "cpu_full_adder.hpp"
+
+SC_MODULE(test_cpu_full_adder)
+{
+	sc_out<bool> a,b,c;
+	sc_in<bool> clk;
+
+	void test_cpu_full_adder_stim()
+	{
+		wait();
+		a.write(0);
+		b.write(0);
+		c.write(0);
+
+		wait();
+		a.write(0);
+		b.write(1);
+		c.write(0);
+
+		wait();
+		a.write(1);
+		b.write(0);
+		c.write(0);
+
+		wait();
+		a.write(1);
+		b.write(1);
+		c.write(0);
+
+		wait();
+		a.write(0);
+		b.write(0);
+		c.write(1);
+
+		wait();
+		a.write(0);
+		b.write(1);
+		c.write(1);
+
+		wait();
+		a.write(1);
+		b.write(0);
+		c.write(1);
+
+		wait();
+		a.write(1);
+		b.write(1);
+		c.write(1);
+
+		wait();
+
+		sc_stop();
+	}
+
+	SC_CTOR(test_cpu_full_adder)
+	{
+		SC_THREAD(test_cpu_full_adder_stim);
+		sensitive << clk.pos();
+
+	}
+};
+
+int sc_main(int argc, char **argv) {
+	sc_signal<bool> sig_in_a, sig_in_b, sig_in_c, sig_out_sum, sig_out_carry;
+	sc_clock TestClk("TestClk", 10, SC_NS, 0.5, 1, SC_NS);
+
+	test_cpu_full_adder Stim1("Stimulus");
+	Stim1.a(sig_in_a);
+	Stim1.b(sig_in_b);
+	Stim1.c(sig_in_c);
+	Stim1.clk(TestClk);
+
+	cpu_full_adder DUT("cpu_full_adder");
+	DUT.in_a(sig_in_a);
+	DUT.in_b(sig_in_b);
+	DUT.in_c(sig_in_c);
+	DUT.out_sum(sig_out_sum);
+	DUT.out_carry(sig_out_carry);
+
+	sc_trace_file *Tf;
+	Tf = sc_create_vcd_trace_file("trace_cpu_full_adder.dat");
+	sc_trace(Tf, sig_in_a, "IN_A");
+	sc_trace(Tf, sig_in_b, "IN_B");
+	sc_trace(Tf, sig_in_c, "IN_C");
+	sc_trace(Tf, sig_out_sum, "OUT_SUM");
+	sc_trace(Tf, sig_out_carry, "OUT_CARRY");
+
+	sc_start();
+	sc_close_vcd_trace_file(Tf);
+
+	return(0);
+}
\ No newline at end of file
diff --git a/cpu8/cpu_full_adder/cpu_full_adder.hpp b/cpu8/cpu_full_adder/cpu_full_adder.hpp
new file mode 100644
index 0000000..09fc290
--- /dev/null
+++ b/cpu8/cpu_full_adder/cpu_full_adder.hpp
@@ -0,0 +1,90 @@
+#ifndef __SYSC_CPU_FULL_ADDER_HPP
+#define __SYSC_CPU_FULL_ADDER_HPP
+
+#include "systemc.h"
+#include "../cpu_and/cpu_and.hpp"
+#include "../cpu_or/cpu_or.hpp"
+#include "../cpu_not/cpu_not.hpp"
+#include "../cpu_half_adder/cpu_half_adder.hpp"
+
+/*
+SC_MODULE (cpu_and2) 
+{
+	sc_in <bool> in_a;
+	sc_in <bool> in_b;
+	sc_port<sc_signal_out_if<bool>,2> out_c;
+
+	void do_and2()
+	{
+		//out_c[0]->write( in_a.read() && in_b.read() );
+		for (int i=0; i<out_c.size();i++)
+		{
+			out_c[i]->write(in_a.read() && in_b.read());
+		}
+	}
+
+	SC_CTOR(cpu_and2)
+	{
+		SC_METHOD(do_and2);
+		sensitive << in_a << in_b;
+	}
+
+};
+*/
+
+SC_MODULE (cpu_full_adder) 
+{
+	//Inputs
+	sc_in <bool> in_a;
+	sc_in <bool> in_b;
+	sc_in <bool> in_c;
+	sc_out <bool> out_sum;
+	sc_out <bool> out_carry;
+
+	cpu_half_adder *halfadd1,*halfadd2;
+	cpu_or *or1;
+
+	sc_signal<bool> sig_half1half2, sig_half1or1, sig_half2or1;
+
+	void do_full_adder()
+	{
+		/*
+		if (in_sel.read() == 0)
+		{
+			out_c.write(in_a.read());
+		}
+		if (in_sel.read() == 1)
+		{
+			out_c.write(in_b.read());
+		}
+		*/
+
+	}
+
+	SC_CTOR(cpu_full_adder)
+	{
+		halfadd1 = new cpu_half_adder("HALFADD1");
+		halfadd2 = new cpu_half_adder("HALFADD2");
+		or1 = new cpu_or("OR1");
+		
+		halfadd1->in_a(in_a);
+		halfadd1->in_b(in_b);
+		halfadd1->out_sum(sig_half1half2);
+		halfadd1->out_carry(sig_half1or1);
+
+		halfadd2->in_a(sig_half1half2);
+		halfadd2->in_b(in_c);
+		halfadd2->out_sum(out_sum);
+		halfadd2->out_carry(sig_half2or1);
+
+		or1->in_a(sig_half1or1);
+		or1->in_b(sig_half2or1);
+		or1->out_c(out_carry);
+
+		//SC_METHOD(do_dmux);
+		//sensitive << in_a << in_b << in_sel;
+	}
+
+};
+
+#endif
\ No newline at end of file